{"id":"https://openalex.org/W2153179875","doi":"https://doi.org/10.1145/1046192.1046208","title":"Techniques for synthesizing binaries to an advanced register/memory structure","display_name":"Techniques for synthesizing binaries to an advanced register/memory structure","publication_year":2005,"publication_date":"2005-02-20","ids":{"openalex":"https://openalex.org/W2153179875","doi":"https://doi.org/10.1145/1046192.1046208","mag":"2153179875"},"language":"en","primary_location":{"id":"doi:10.1145/1046192.1046208","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046208","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088031457","display_name":"Greg Stitt","orcid":"https://orcid.org/0000-0001-7159-7439"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Greg Stitt","raw_affiliation_strings":["University of California, Riverside, CA"],"affiliations":[{"raw_affiliation_string":"University of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112813395","display_name":"Zhi Guo","orcid":"https://orcid.org/0000-0001-5469-4309"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhi Guo","raw_affiliation_strings":["University of California, Riverside, CA"],"affiliations":[{"raw_affiliation_string":"University of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033921328","display_name":"Walid Najjar","orcid":"https://orcid.org/0000-0001-6761-6801"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Walid Najjar","raw_affiliation_strings":["University of California, Riverside, CA"],"affiliations":[{"raw_affiliation_string":"University of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001290812","display_name":"Frank Vahid","orcid":"https://orcid.org/0000-0001-5416-0032"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]},{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"education","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Frank Vahid","raw_affiliation_strings":["University of California, Riverside, CA and University of California, Irvine, CA"],"affiliations":[{"raw_affiliation_string":"University of California, Riverside, CA and University of California, Irvine, CA","institution_ids":["https://openalex.org/I103635307","https://openalex.org/I204250578"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5088031457"],"corresponding_institution_ids":["https://openalex.org/I103635307"],"apc_list":null,"apc_paid":null,"fwci":2.1104,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.87994234,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"118","last_page":"124"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/porting","display_name":"Porting","score":0.8338432312011719},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7868263721466064},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7274795770645142},{"id":"https://openalex.org/keywords/binary-translation","display_name":"Binary translation","score":0.7060942649841309},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5879021883010864},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5783662796020508},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.5556294918060303},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5473929643630981},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5173187255859375},{"id":"https://openalex.org/keywords/control-flow","display_name":"Control flow","score":0.44766849279403687},{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.4332755506038666},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4316999912261963},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39378929138183594},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3737630844116211},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.24128228425979614},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.17202818393707275},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.09852921962738037}],"concepts":[{"id":"https://openalex.org/C106251023","wikidata":"https://www.wikidata.org/wiki/Q851989","display_name":"Porting","level":3,"score":0.8338432312011719},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7868263721466064},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7274795770645142},{"id":"https://openalex.org/C2778971978","wikidata":"https://www.wikidata.org/wiki/Q2287075","display_name":"Binary translation","level":3,"score":0.7060942649841309},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5879021883010864},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5783662796020508},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.5556294918060303},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5473929643630981},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5173187255859375},{"id":"https://openalex.org/C160191386","wikidata":"https://www.wikidata.org/wiki/Q868299","display_name":"Control flow","level":2,"score":0.44766849279403687},{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.4332755506038666},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4316999912261963},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39378929138183594},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3737630844116211},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.24128228425979614},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.17202818393707275},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.09852921962738037},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1046192.1046208","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1046192.1046208","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.59.8383","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.59.8383","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.ucr.edu/~vahid/pubs/fpga05_binsyn.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.65.3154","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.65.3154","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.ucr.edu/~najjar/papers/2005/fpga05_binsyn.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W159807662","https://openalex.org/W1489161438","https://openalex.org/W1578833516","https://openalex.org/W1837646587","https://openalex.org/W1954746259","https://openalex.org/W2032094184","https://openalex.org/W2048672904","https://openalex.org/W2051498260","https://openalex.org/W2105984256","https://openalex.org/W2127859789","https://openalex.org/W2140156318","https://openalex.org/W2596526116"],"related_works":["https://openalex.org/W1499890669","https://openalex.org/W2432304421","https://openalex.org/W4301139505","https://openalex.org/W2290222670","https://openalex.org/W2356878786","https://openalex.org/W2031425765","https://openalex.org/W3215002812","https://openalex.org/W2015960018","https://openalex.org/W2101361221","https://openalex.org/W23255398"],"abstract_inverted_index":{"Recent":[0],"works":[1,40],"demonstrate":[2,118],"several":[3],"benefits":[4],"of":[5,76,107,137,151],"synthesizing":[6,32],"software":[7,18,33],"binaries":[8,26],"onto":[9],"FPGA":[10,37],"hardware,":[11],"including":[12],"incorporating":[13],"hardware":[14],"design":[15],"into":[16,90],"established":[17],"tool":[19,95],"flows":[20],"with":[21,149,172],"minimal":[22],"impact,":[23],"porting":[24],"existing":[25,92],"to":[27,35,53,97,104],"FPGAs,":[28],"and":[29,84,100,162],"even":[30],"dynamically":[31],"kernels":[34],"faster":[36],"coprocessors.":[38],"Those":[39],"showed":[41],"that":[42,73,124,164],"standard":[43],"binary":[44,93,128,144],"decompilation":[45,88],"methods":[46,61,126,166],"can":[47],"recover":[48,98],"enough":[49],"high-level":[50,78],"control":[51],"information":[52,81],"result":[54],"in":[55,102],"reasonably-efficient":[56],"hardware.":[57],"However,":[58],"recent":[59],"synthesis":[60,94,113,129,152],"for":[62,159],"FPGAs":[63],"utilize":[64],"advanced":[65,108],"memory":[66,109],"structures,":[67],"such":[68],"as":[69],"a":[70,115],"\"smart":[71],"buffer,\"":[72],"require":[74],"recovery":[75],"additional":[77],"information,":[79],"specifically":[80],"about":[82],"loops":[83,99],"arrays.":[85],"We":[86,117],"incorporate":[87],"techniques":[89],"an":[91],"flow":[96],"arrays":[101],"order":[103],"take":[105],"advantage":[106],"structures":[110],"when":[111],"performing":[112],"from":[114,154],"binary.":[116],"through":[119],"experiments":[120],"on":[121],"six":[122],"benchmarks":[123],"our":[125,165],"improve":[127],"performance":[130,170],"by":[131,133],"53%,":[132],"making":[134],"effective":[135],"use":[136],"smart":[138,147],"buffers.":[139],"Furthermore,":[140],"we":[141],"compare":[142],"the":[143,155,160],"results":[145,150,171],"using":[146],"buffers":[148],"directly":[153],"original":[156],"C":[157],"code":[158],"benchmarks,":[161],"show":[163],"achieved":[167],"almost":[168],"identical":[169],"only":[173],"10%":[174],"area":[175],"overhead.":[176]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
