{"id":"https://openalex.org/W2077398506","doi":"https://doi.org/10.1145/1044823.1044826","title":"An analysis of a resource efficient checkpoint architecture","display_name":"An analysis of a resource efficient checkpoint architecture","publication_year":2004,"publication_date":"2004-12-01","ids":{"openalex":"https://openalex.org/W2077398506","doi":"https://doi.org/10.1145/1044823.1044826","mag":"2077398506"},"language":"en","primary_location":{"id":"doi:10.1145/1044823.1044826","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1044823.1044826","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1044823.1044826","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://dl.acm.org/doi/pdf/10.1145/1044823.1044826","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065922595","display_name":"Haitham Akkary","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Haitham Akkary","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR","Intel Corporation, Hillsboro, OR#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050488573","display_name":"Ravi Rajwar","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ravi Rajwar","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR","Intel Corporation, Hillsboro, OR#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069298429","display_name":"Srikanth T. Srinivasan","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Srikanth T. Srinivasan","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR","Intel Corporation, Hillsboro, OR#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5065922595"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.7946,"has_fulltext":true,"cited_by_count":24,"citation_normalized_percentile":{"value":0.71957478,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"1","issue":"4","first_page":"418","last_page":"444"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8890559673309326},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.7349416017532349},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5827783942222595},{"id":"https://openalex.org/keywords/out-of-order-execution","display_name":"Out-of-order execution","score":0.5337703227996826},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.47913238406181335},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.47582104802131653},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4294697940349579},{"id":"https://openalex.org/keywords/window","display_name":"Window (computing)","score":0.42574653029441833},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4241303503513336},{"id":"https://openalex.org/keywords/instruction-scheduling","display_name":"Instruction scheduling","score":0.4178515672683716},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3807108402252197},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3226408362388611},{"id":"https://openalex.org/keywords/dynamic-priority-scheduling","display_name":"Dynamic priority scheduling","score":0.1731174886226654}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8890559673309326},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.7349416017532349},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5827783942222595},{"id":"https://openalex.org/C1793878","wikidata":"https://www.wikidata.org/wiki/Q1153762","display_name":"Out-of-order execution","level":2,"score":0.5337703227996826},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.47913238406181335},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.47582104802131653},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4294697940349579},{"id":"https://openalex.org/C2778751112","wikidata":"https://www.wikidata.org/wiki/Q835016","display_name":"Window (computing)","level":2,"score":0.42574653029441833},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4241303503513336},{"id":"https://openalex.org/C73564150","wikidata":"https://www.wikidata.org/wiki/Q11417093","display_name":"Instruction scheduling","level":5,"score":0.4178515672683716},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3807108402252197},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3226408362388611},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.1731174886226654},{"id":"https://openalex.org/C119948110","wikidata":"https://www.wikidata.org/wiki/Q7858726","display_name":"Two-level scheduling","level":4,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1044823.1044826","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1044823.1044826","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1044823.1044826","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.100.989","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.100.989","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://pages.cs.wisc.edu/~rajwar/papers/taco04.pdf","raw_type":"text"}],"best_oa_location":{"id":"doi:10.1145/1044823.1044826","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1044823.1044826","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1044823.1044826","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8","score":0.4300000071525574}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2077398506.pdf","grobid_xml":"https://content.openalex.org/works/W2077398506.grobid-xml"},"referenced_works_count":30,"referenced_works":["https://openalex.org/W63944998","https://openalex.org/W1482147200","https://openalex.org/W1828679824","https://openalex.org/W1966151719","https://openalex.org/W2019674193","https://openalex.org/W2034996068","https://openalex.org/W2089363288","https://openalex.org/W2102388010","https://openalex.org/W2108039095","https://openalex.org/W2112324761","https://openalex.org/W2112833506","https://openalex.org/W2118859527","https://openalex.org/W2118896605","https://openalex.org/W2121050483","https://openalex.org/W2123845384","https://openalex.org/W2129889140","https://openalex.org/W2137156241","https://openalex.org/W2137860371","https://openalex.org/W2140782438","https://openalex.org/W2147098645","https://openalex.org/W2161864047","https://openalex.org/W2173501262","https://openalex.org/W2542426564","https://openalex.org/W2544627682","https://openalex.org/W2912263513","https://openalex.org/W2913899326","https://openalex.org/W2916411819","https://openalex.org/W4236305290","https://openalex.org/W4253795537","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W4246048158","https://openalex.org/W2562747857","https://openalex.org/W2062999595","https://openalex.org/W2137719453","https://openalex.org/W1507713810","https://openalex.org/W1916582918","https://openalex.org/W4301270406","https://openalex.org/W2791380360","https://openalex.org/W2065030266","https://openalex.org/W2122956929"],"abstract_inverted_index":{"Large":[0],"instruction":[1,12,27,53,115,175],"window":[2,28,54,105],"processors":[3],"achieve":[4],"high":[5,63],"performance":[6,112,171],"by":[7],"exposing":[8],"large":[9,17,52,58,85,114,183],"amounts":[10],"of":[11,71,87,113,177,179],"level":[13],"parallelism.":[14],"However,":[15],"accessing":[16],"hardware":[18,185],"structures":[19,59],"typically":[20],"required":[21],"to":[22,49,94,117,121,169,174],"buffer":[23],"and":[24,42,46,89,98,155],"process":[25],"such":[26],"sizes":[29],"significantly":[30],"degrade":[31],"the":[32,111,122],"cycle":[33],"time.":[34],"This":[35],"paper":[36],"proposes":[37],"a":[38,51,62,72,84,146,167],"novel":[39,131],"checkpoint":[40,140],"processing":[41],"recovery":[43],"(CPR)":[44],"microarchitecture,":[45],"shows":[47],"how":[48],"implement":[50],"processor":[55,168],"without":[56,181],"requiring":[57,182],"thus":[60],"permitting":[61],"clock":[64],"frequency.We":[65],"focus":[66],"on":[67],"four":[68],"critical":[69],"aspects":[70],"microarchitecture:":[73],"(1)":[74],"scheduling":[75,104],"instructions,":[76],"(2)":[77],"recovering":[78,143],"from":[79,92,144],"branch":[80],"mispredicts,":[81,145],"(3)":[82],"buffering":[83],"number":[86],"stores":[88,93],"forwarding":[90],"data":[91],"any":[95],"dependent":[96],"load,":[97],"(4)":[99],"reclaiming":[100],"physical":[101,161],"registers.":[102],"While":[103],"size":[106],"is":[107],"important,":[108],"we":[109],"show":[110],"windows":[116,176],"be":[118],"more":[119],"sensitive":[120],"other":[123],"three":[124],"design":[125,137],"issues.":[126],"Our":[127,164],"CPR":[128],"proposal":[129],"incorporates":[130],"microarchitectural":[132],"schemes":[133],"for":[134,142,151,159],"addressing":[135],"these":[136],"issues---a":[138],"selective":[139],"mechanism":[141],"hierarchical":[147],"store":[148],"queue":[149],"organization":[150],"fast":[152],"store-load":[153],"forwarding,":[154],"an":[156],"effective":[157],"algorithm":[158],"aggressive":[160],"register":[162],"reclamation.":[163],"proposals":[165],"allow":[166],"realize":[170],"gains":[172],"due":[173],"thousands":[178],"instructions":[180],"cycle-critical":[184],"structures.":[186]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":5}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}