{"id":"https://openalex.org/W2148004594","doi":"https://doi.org/10.1145/1044823.1044825","title":"Toward kilo-instruction processors","display_name":"Toward kilo-instruction processors","publication_year":2004,"publication_date":"2004-12-01","ids":{"openalex":"https://openalex.org/W2148004594","doi":"https://doi.org/10.1145/1044823.1044825","mag":"2148004594"},"language":"en","primary_location":{"id":"doi:10.1145/1044823.1044825","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1044823.1044825","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1044823.1044825","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://dl.acm.org/doi/pdf/10.1145/1044823.1044825","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084390427","display_name":"Adri\u00e1n Cristal","orcid":"https://orcid.org/0000-0003-1277-9296"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Adri\u00e1n Cristal","raw_affiliation_strings":["Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051542107","display_name":"Oliverio J. Santana","orcid":"https://orcid.org/0000-0001-7511-5783"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Oliverio J. Santana","raw_affiliation_strings":["Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020844763","display_name":"Mateo Valero","orcid":"https://orcid.org/0000-0003-2917-2482"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Mateo Valero","raw_affiliation_strings":["Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083127721","display_name":"Jos\u00e9 F. Mart\u00ednez","orcid":"https://orcid.org/0000-0001-5451-5681"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jos\u00e9 F. Mart\u00ednez","raw_affiliation_strings":["Cornell University, Ithaca, NY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.9767,"has_fulltext":true,"cited_by_count":79,"citation_normalized_percentile":{"value":0.9539433,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"1","issue":"4","first_page":"389","last_page":"417"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9058972001075745},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6473777294158936},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.5998514294624329},{"id":"https://openalex.org/keywords/out-of-order-execution","display_name":"Out-of-order execution","score":0.5744054913520813},{"id":"https://openalex.org/keywords/commit","display_name":"Commit","score":0.5181375741958618},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5101178288459778},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5095351338386536},{"id":"https://openalex.org/keywords/queue","display_name":"Queue","score":0.45867639780044556},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4361271262168884},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4238305985927582},{"id":"https://openalex.org/keywords/speculative-execution","display_name":"Speculative execution","score":0.41098666191101074},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3772794008255005},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3400722146034241},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.33797961473464966},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1421089768409729}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9058972001075745},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6473777294158936},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.5998514294624329},{"id":"https://openalex.org/C1793878","wikidata":"https://www.wikidata.org/wiki/Q1153762","display_name":"Out-of-order execution","level":2,"score":0.5744054913520813},{"id":"https://openalex.org/C153180980","wikidata":"https://www.wikidata.org/wiki/Q19776675","display_name":"Commit","level":2,"score":0.5181375741958618},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5101178288459778},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5095351338386536},{"id":"https://openalex.org/C160403385","wikidata":"https://www.wikidata.org/wiki/Q220543","display_name":"Queue","level":2,"score":0.45867639780044556},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4361271262168884},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4238305985927582},{"id":"https://openalex.org/C141331961","wikidata":"https://www.wikidata.org/wiki/Q2164465","display_name":"Speculative execution","level":2,"score":0.41098666191101074},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3772794008255005},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3400722146034241},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.33797961473464966},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1421089768409729},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1044823.1044825","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1044823.1044825","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1044823.1044825","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.86.3606","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.86.3606","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://m3.csl.cornell.edu/papers/taco04.pdf","raw_type":"text"},{"id":"pmh:oai:accedacris.ulpgc.es:10553/50503","is_oa":false,"landing_page_url":"http://hdl.handle.net/10553/50503","pdf_url":null,"source":{"id":"https://openalex.org/S4306400136","display_name":"Acceda (Universidad de Las Palmas de Gran Canaria)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ACM Transactions on Architecture and Code Optimization [ISSN 1544-3566], v. 1 (4), p. 389-417","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"doi:10.1145/1044823.1044825","is_oa":true,"landing_page_url":"https://doi.org/10.1145/1044823.1044825","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/1044823.1044825","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G4596813387","display_name":"Checkpointed Processor Architectures","funder_award_id":"0429922","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320317579","display_name":"HiPEAC Network","ror":null}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2148004594.pdf","grobid_xml":"https://content.openalex.org/works/W2148004594.grobid-xml"},"referenced_works_count":47,"referenced_works":["https://openalex.org/W1503640484","https://openalex.org/W1583397562","https://openalex.org/W1828679824","https://openalex.org/W2019674193","https://openalex.org/W2033879735","https://openalex.org/W2034996068","https://openalex.org/W2064909421","https://openalex.org/W2099089002","https://openalex.org/W2099958604","https://openalex.org/W2103993233","https://openalex.org/W2105194472","https://openalex.org/W2107493680","https://openalex.org/W2108039095","https://openalex.org/W2110078216","https://openalex.org/W2118859527","https://openalex.org/W2118896605","https://openalex.org/W2123608497","https://openalex.org/W2123845384","https://openalex.org/W2125203708","https://openalex.org/W2135742449","https://openalex.org/W2136348740","https://openalex.org/W2146173591","https://openalex.org/W2146246439","https://openalex.org/W2147098645","https://openalex.org/W2149379863","https://openalex.org/W2160313031","https://openalex.org/W2161864047","https://openalex.org/W2162773908","https://openalex.org/W2168307289","https://openalex.org/W2168434784","https://openalex.org/W2169823452","https://openalex.org/W2171006257","https://openalex.org/W2173501262","https://openalex.org/W2294693415","https://openalex.org/W2542426564","https://openalex.org/W2911527118","https://openalex.org/W2913899326","https://openalex.org/W2916411819","https://openalex.org/W3138244926","https://openalex.org/W4205342357","https://openalex.org/W4232019702","https://openalex.org/W4236305290","https://openalex.org/W4240515487","https://openalex.org/W4245503759","https://openalex.org/W4253795537","https://openalex.org/W4254359804","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2088598399","https://openalex.org/W2562747857","https://openalex.org/W2054557177","https://openalex.org/W1916582918","https://openalex.org/W1934130410","https://openalex.org/W4379116082","https://openalex.org/W2533681803","https://openalex.org/W2137719453","https://openalex.org/W1871245754","https://openalex.org/W2113960387"],"abstract_inverted_index":{"The":[0],"continuously":[1],"increasing":[2],"gap":[3],"between":[4],"processor":[5,58,94,106,173],"and":[6,73,132,151,156,184],"memory":[7,24,196],"speeds":[8],"is":[9,64],"a":[10,29,110,119,134,140,171],"serious":[11],"limitation":[12],"to":[13,60,70,84,127],"the":[14,36,51,89,105,114,192],"performance":[15,189],"achievable":[16],"by":[17,27,118],"future":[18],"microprocessors.":[19],"Currently,":[20],"processors":[21],"tolerate":[22],"long-latency":[23],"operations":[25],"largely":[26],"maintaining":[28],"high":[30,188],"number":[31],"of":[32,47,54,102,113,130,142,154,159,181,194],"in-flight":[33,48,182],"instructions.":[34,49],"In":[35],"future,":[37],"this":[38,77,86],"may":[39,186],"require":[40],"supporting":[41],"many":[42],"hundreds,":[43],"or":[44],"even":[45,190],"thousands,":[46],"Unfortunately,":[50],"traditional":[52],"approach":[53],"scaling":[55],"up":[56],"critical":[57,93],"structures":[59],"provide":[61],"such":[62,144],"support":[63,179],"impractical":[65],"at":[66],"these":[67,165],"levels,":[68],"due":[69],"area,":[71],"power,":[72],"cycle":[74],"time":[75],"constraints.In":[76],"paper":[78],"we":[79,108,169],"show":[80],"that,":[81],"in":[82,91,191],"order":[83],"overcome":[85],"resource-scalability":[87],"problem,":[88],"way":[90],"which":[92],"resources":[95],"are":[96],"managed":[97],"must":[98],"be":[99],"changed.":[100],"Instead":[101],"simply":[103],"upsizing":[104],"structures,":[107],"propose":[109],"smarter":[111],"use":[112],"available":[115],"resources,":[116],"supported":[117],"selective":[120],"checkpointing":[121],"mechanism.":[122],"This":[123],"mechanism":[124],"allows":[125],"instructions":[126],"commit":[128],"out":[129],"order,":[131],"makes":[133],"reorder":[135],"buffer":[136],"unnecessary.":[137],"We":[138],"present":[139],"set":[141],"techniques":[143,166],"as":[145],"multilevel":[146],"instruction":[147],"queues,":[148],"late":[149],"allocation":[150],"early":[152,157],"release":[153,158],"registers,":[155],"load/store":[160],"queue":[161],"entries.":[162],"All":[163],"together,":[164],"constitute":[167],"what":[168],"call":[170],"kilo-instruction":[172],",":[174],"an":[175],"architecture":[176],"that":[177],"can":[178],"thousands":[180],"instructions,":[183],"thus":[185],"achieve":[187],"presence":[193],"large":[195],"access":[197],"latencies.":[198]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":7},{"year":2012,"cited_by_count":3}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
