{"id":"https://openalex.org/W2165160270","doi":"https://doi.org/10.1145/1024393.1024424","title":"Heat-and-run","display_name":"Heat-and-run","publication_year":2004,"publication_date":"2004-10-07","ids":{"openalex":"https://openalex.org/W2165160270","doi":"https://doi.org/10.1145/1024393.1024424","mag":"2165160270"},"language":"en","primary_location":{"id":"doi:10.1145/1024393.1024424","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1024393.1024424","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 11th international conference on Architectural support for programming languages and operating systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111913385","display_name":"Mohamed Gomaa","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Mohamed Gomaa","raw_affiliation_strings":["Purdue University, West Lafayette, IN"],"affiliations":[{"raw_affiliation_string":"Purdue University, West Lafayette, IN","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072831199","display_name":"Michael D. Powell","orcid":"https://orcid.org/0000-0003-2881-1334"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael D. Powell","raw_affiliation_strings":["Purdue University, West Lafayette, IN"],"affiliations":[{"raw_affiliation_string":"Purdue University, West Lafayette, IN","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103145581","display_name":"T. N. Vijaykumar","orcid":"https://orcid.org/0000-0001-6624-4372"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. N. Vijaykumar","raw_affiliation_strings":["Purdue University, West Lafayette, IN"],"affiliations":[{"raw_affiliation_string":"Purdue University, West Lafayette, IN","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5111913385"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":12.1728,"has_fulltext":false,"cited_by_count":299,"citation_normalized_percentile":{"value":0.99096018,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"260","last_page":"270"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.709972620010376},{"id":"https://openalex.org/keywords/simultaneous-multithreading","display_name":"Simultaneous multithreading","score":0.6359434127807617},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.6135287284851074},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5697124004364014},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.5171222686767578},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5143266916275024},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4973502457141876},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4915660321712494},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4818785786628723},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.46698707342147827},{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.4640781879425049},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.44458502531051636},{"id":"https://openalex.org/keywords/frequency-scaling","display_name":"Frequency scaling","score":0.43667787313461304},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.385763943195343},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.24875226616859436},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17948728799819946},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17483294010162354},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.1630432903766632},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1205148696899414}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.709972620010376},{"id":"https://openalex.org/C85717602","wikidata":"https://www.wikidata.org/wiki/Q82178","display_name":"Simultaneous multithreading","level":4,"score":0.6359434127807617},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.6135287284851074},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5697124004364014},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.5171222686767578},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5143266916275024},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4973502457141876},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4915660321712494},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4818785786628723},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.46698707342147827},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.4640781879425049},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.44458502531051636},{"id":"https://openalex.org/C157742956","wikidata":"https://www.wikidata.org/wiki/Q3237776","display_name":"Frequency scaling","level":3,"score":0.43667787313461304},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.385763943195343},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.24875226616859436},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17948728799819946},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17483294010162354},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.1630432903766632},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1205148696899414},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1024393.1024424","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1024393.1024424","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 11th international conference on Architectural support for programming languages and operating systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W65564217","https://openalex.org/W162527601","https://openalex.org/W1490789535","https://openalex.org/W2032094184","https://openalex.org/W2085830671","https://openalex.org/W2098228187","https://openalex.org/W2100404320","https://openalex.org/W2102727118","https://openalex.org/W2103397328","https://openalex.org/W2106625514","https://openalex.org/W2118532220","https://openalex.org/W2120230074","https://openalex.org/W2135948795","https://openalex.org/W2154857344","https://openalex.org/W2163143091","https://openalex.org/W4238816702","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2133675875","https://openalex.org/W2158148381","https://openalex.org/W3149034384","https://openalex.org/W2497398711","https://openalex.org/W2154169726","https://openalex.org/W2097410296","https://openalex.org/W2475077126","https://openalex.org/W1894651528","https://openalex.org/W2057234250","https://openalex.org/W2526922904"],"abstract_inverted_index":{"Power":[0,34],"density":[1,19,35,56,90],"in":[2,78],"high-performance":[3],"processors":[4],"continues":[5],"to":[6,31,54,70,109,151,156,166,187,197,213,220,234],"increase":[7,131,167],"with":[8,114],"technology":[9],"generations":[10],"as":[11],"scaling":[12],"of":[13,23,29,206,230,247],"current,":[14],"clock":[15,60],"speed,":[16],"and":[17,26,48,96,123,129,133,154,194,232],"device":[18],"outpaces":[20],"the":[21,102,148,244],"downscaling":[22],"supply":[24],"voltage":[25],"thermal":[27],"ability":[28],"packages":[30],"dissipate":[32],"heat.":[33],"is":[36,91,147],"characterized":[37],"by":[38,174],"localized":[39],"chip":[40,111],"hot":[41],"spots":[42],"that":[43,177,224],"can":[44],"reach":[45],"critical":[46],"temperatures":[47],"cause":[49],"failure.":[50],"Previous":[51,82],"architectural":[52],"approaches":[53,83],"power":[55,89,126,158],"have":[57],"used":[58],"global":[59],"gating,":[61],"fetch":[62],"toggling,":[63],"dynamic":[64],"frequency":[65],"scaling,":[66],"or":[67,74],"resource":[68],"duplication":[69],"either":[71],"prevent":[72],"heating":[73],"relieve":[75],"overheated":[76,192,218],"resources":[77],"a":[79,93,239],"superscalar":[80,241],"processor.":[81,103],"also":[84,138],"evaluate":[85],"design":[86],"technologies":[87],"where":[88],"not":[92,100],"major":[94],"problem":[95],"most":[97],"applications":[98],"do":[99],"overheat":[101],"Future":[104],"processors,":[105],"however,":[106],"are":[107],"likely":[108],"be":[110],"multiprocessors":[112],"(CMPs)":[113],"simultaneously-multithreaded":[115],"(SMT)":[116],"cores.":[117],"SMT":[118,128,153,163,199,207],"CMPs":[119],"pose":[120],"unique":[121],"challenges":[122],"opportunities":[124],"for":[125,142],"density.":[127,159],"CMP":[130,155,184,211],"throughput":[132,215,237],"thus":[134],"on-chip":[135],"heat,":[136],"but":[137],"provide":[139],"natural":[140],"granularities":[141],"managing":[143],"power-density.":[144],"This":[145],"paper":[146],"first":[149],"work":[150],"leverage":[152],"address":[157],"We":[160,181,222],"propose":[161,182],"heat-and-run":[162,183],"thread":[164,185],"assignment":[165],"processor-resource":[168],"utilization":[169],"before":[170],"cooling":[171],"becomes":[172],"necessary":[173],"co-scheduling":[175],"threads":[176,189],"use":[178],"complimentary":[179],"resources.":[180],"migration":[186],"migrate":[188],"away":[190],"from":[191],"cores":[193,212,219],"assign":[195],"them":[196],"free":[198],"contexts":[200,208],"on":[201,209],"alternate":[202,210],"cores,":[203],"leveraging":[204],"availability":[205],"maintain":[214],"while":[216],"allowing":[217],"cool.":[221],"show":[223],"our":[225],"proposal":[226],"has":[227],"an":[228],"average":[229],"9%":[231],"up":[233],"34%":[235],"higher":[236],"than":[238],"previous":[240],"technique":[242],"running":[243],"same":[245],"number":[246],"threads.":[248]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":13},{"year":2015,"cited_by_count":9},{"year":2014,"cited_by_count":16},{"year":2013,"cited_by_count":26},{"year":2012,"cited_by_count":22}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2016-06-24T00:00:00"}
