{"id":"https://openalex.org/W2141360667","doi":"https://doi.org/10.1145/1024393.1024411","title":"Helper threads via virtual multithreading on an experimental itanium <sup>\u00ae</sup> 2 processor-based platform","display_name":"Helper threads via virtual multithreading on an experimental itanium <sup>\u00ae</sup> 2 processor-based platform","publication_year":2004,"publication_date":"2004-10-07","ids":{"openalex":"https://openalex.org/W2141360667","doi":"https://doi.org/10.1145/1024393.1024411","mag":"2141360667"},"language":"en","primary_location":{"id":"doi:10.1145/1024393.1024411","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1024393.1024411","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 11th international conference on Architectural support for programming languages and operating systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008708613","display_name":"Perry H. Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Perry H. Wang","raw_affiliation_strings":["Intel Corp","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005994838","display_name":"Jamison D. Collins","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Jamison D. Collins","raw_affiliation_strings":["Intel Corp","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100371015","display_name":"Hong Wang","orcid":"https://orcid.org/0009-0008-2874-2168"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Hong Wang","raw_affiliation_strings":["Intel Corp","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111529492","display_name":"Dong-Keun Kim","orcid":"https://orcid.org/0000-0001-6093-126X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I66946132","display_name":"University of Maryland, College Park","ror":"https://ror.org/047s2c258","country_code":"US","type":"education","lineage":["https://openalex.org/I66946132"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dongkeun Kim","raw_affiliation_strings":["Intel Corp. and University of Maryland, College Park, MD"],"affiliations":[{"raw_affiliation_string":"Intel Corp. and University of Maryland, College Park, MD","institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I66946132"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003268322","display_name":"Bill Greene","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Bill Greene","raw_affiliation_strings":["Intel Corp","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031667623","display_name":"Kai-Ming Chan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Kai-Ming Chan","raw_affiliation_strings":["Intel Corp","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067902662","display_name":"Aamir B. Yunus","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Aamir B. Yunus","raw_affiliation_strings":["Intel Corp","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063963904","display_name":"Terry Sych","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Terry Sych","raw_affiliation_strings":["Intel Corp","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113512917","display_name":"Stephen F. Moore","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Stephen F. Moore","raw_affiliation_strings":["Intel Corp","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007315039","display_name":"John Paul Shen","orcid":"https://orcid.org/0000-0003-4588-2775"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"John P. Shen","raw_affiliation_strings":["Intel Corp","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corp","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":10,"corresponding_author_ids":["https://openalex.org/A5008708613"],"corresponding_institution_ids":["https://openalex.org/I4210158342"],"apc_list":null,"apc_paid":null,"fwci":4.4762,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.94466919,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"144","last_page":"155"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8669419288635254},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.7329091429710388},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.7205125093460083},{"id":"https://openalex.org/keywords/simultaneous-multithreading","display_name":"Simultaneous multithreading","score":0.6228604316711426},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.6225395202636719},{"id":"https://openalex.org/keywords/instruction-prefetch","display_name":"Instruction prefetch","score":0.5813000798225403},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5147976279258728},{"id":"https://openalex.org/keywords/speculative-multithreading","display_name":"Speculative multithreading","score":0.5096027851104736},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.4424828588962555},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.40138232707977295},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3368811309337616}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8669419288635254},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.7329091429710388},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.7205125093460083},{"id":"https://openalex.org/C85717602","wikidata":"https://www.wikidata.org/wiki/Q82178","display_name":"Simultaneous multithreading","level":4,"score":0.6228604316711426},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.6225395202636719},{"id":"https://openalex.org/C133588205","wikidata":"https://www.wikidata.org/wiki/Q28455645","display_name":"Instruction prefetch","level":3,"score":0.5813000798225403},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5147976279258728},{"id":"https://openalex.org/C15296174","wikidata":"https://www.wikidata.org/wiki/Q7575343","display_name":"Speculative multithreading","level":4,"score":0.5096027851104736},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.4424828588962555},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.40138232707977295},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3368811309337616}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1024393.1024411","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1024393.1024411","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 11th international conference on Architectural support for programming languages and operating systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","display_name":"Peace, Justice and strong institutions","score":0.7400000095367432}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W1888754220","https://openalex.org/W1921012695","https://openalex.org/W1940650585","https://openalex.org/W1976058961","https://openalex.org/W1976623675","https://openalex.org/W1995140396","https://openalex.org/W2019674193","https://openalex.org/W2040701288","https://openalex.org/W2044512256","https://openalex.org/W2044773873","https://openalex.org/W2071009745","https://openalex.org/W2099089002","https://openalex.org/W2099958604","https://openalex.org/W2108290909","https://openalex.org/W2111905231","https://openalex.org/W2120230074","https://openalex.org/W2121018372","https://openalex.org/W2122287586","https://openalex.org/W2123608497","https://openalex.org/W2126605567","https://openalex.org/W2131498141","https://openalex.org/W2137296754","https://openalex.org/W2146173591","https://openalex.org/W2146246439","https://openalex.org/W2152496451","https://openalex.org/W2153515302","https://openalex.org/W2155010932","https://openalex.org/W2164968189","https://openalex.org/W2168214303","https://openalex.org/W2168307289","https://openalex.org/W2170582961","https://openalex.org/W2171651200","https://openalex.org/W2172004543","https://openalex.org/W2249344705","https://openalex.org/W2535198237","https://openalex.org/W4232096869","https://openalex.org/W4236135525","https://openalex.org/W4236948309","https://openalex.org/W4250814284","https://openalex.org/W6678126479","https://openalex.org/W6680703539","https://openalex.org/W6684891810"],"related_works":["https://openalex.org/W2105895556","https://openalex.org/W3089467468","https://openalex.org/W2115561485","https://openalex.org/W1985089255","https://openalex.org/W2153202644","https://openalex.org/W1541942136","https://openalex.org/W2010970156","https://openalex.org/W4235861380","https://openalex.org/W2106625514","https://openalex.org/W2380961080"],"abstract_inverted_index":{"Helper":[0],"threading":[1,182],"is":[2,144],"a":[3,7,11,60,76,87,170,193,221],"technology":[4],"to":[5,15,32,40,44,109,117,123,204,226,234],"accelerate":[6],"program":[8],"by":[9,28,94,155],"exploiting":[10],"processor's":[12],"multithreading":[13,58],"capability":[14],"run":[16,124],"``assist''":[17],"threads.":[18,102],"Previous":[19],"experiments":[20],"on":[21,75,146,236],"hyper-threaded":[22],"processors":[23,45],"have":[24,49],"demonstrated":[25],"significant":[26,189],"speedups":[27],"using":[29,152,213],"helper":[30,112,125,181],"threads":[31,126],"prefetch":[33],"hard-to-predict":[34],"delinquent":[35],"data":[36],"accesses.":[37],"In":[38],"order":[39],"apply":[41],"this":[42],"technique":[43],"that":[46],"do":[47],"not":[48],"built-in":[50],"hardware":[51],"support":[52,210],"for":[53,192,228],"multithreading,":[54,66],"we":[55],"introduce":[56],"virtual":[57],"(VMT),":[59],"novel":[61],"form":[62],"of":[63,68,71,130,142,196,224],"switch-on-event":[64],"user-level":[65,101],"capable":[67],"fly-weight":[69],"multiplexing":[70],"event-driven":[72],"thread":[73,113,136],"executions":[74],"single":[77],"processor":[78,151],"without":[79],"additional":[80],"operating":[81],"system":[82,174],"support.":[83],"The":[84,103],"compiler":[85],"plays":[86],"key":[88],"role":[89],"in":[90,115,127,165,239],"minimizing":[91],"synchronization":[92],"cost":[93],"judiciously":[95],"partitioning":[96],"register":[97],"usage":[98],"among":[99],"the":[100,128,134,156,184,214,229,240],"VMT":[104,143,185],"approach":[105],"makes":[106],"it":[107],"possible":[108],"launch":[110],"dynamic":[111],"instances":[114],"response":[116],"long-latency":[118],"cache":[119,131],"miss":[120],"events,":[121],"and":[122,232],"shadow":[129],"misses":[132],"when":[133],"main":[135],"would":[137],"be":[138],"otherwise":[139],"stalled.The":[140],"concept":[141],"prototyped":[145],"an":[147],"Itanium":[148,178],"\u00ae":[149],"2":[150,179],"features":[153],"provided":[154],"Processor":[157],"Abstraction":[158],"Layer":[159],"(PAL)":[160],"firmware":[161],"mechanism":[162,186],"already":[163],"present":[164],"currently":[166],"shipping":[167],"processors.":[168],"On":[169],"4-way":[171],"MP":[172],"physical":[173],"equipped":[175],"with":[176],"VMT-enabled":[177],"processors,":[180],"via":[183],"can":[187],"achieve":[188],"performance":[190],"gains":[191],"diverse":[194],"set":[195],"real-world":[197],"workloads,":[198],"ranging":[199],"from":[200],"single-threaded":[201],"workstation":[202,230],"benchmarks":[203],"heavily":[205],"multithreaded":[206],"large":[207],"scale":[208],"decision":[209],"systems":[211],"(DSS)":[212],"IBM":[215],"DB2":[216],"Universal":[217],"Database.":[218],"We":[219],"measure":[220],"wall-clock":[222],"speedup":[223],"5.8%":[225],"38.5%":[227],"benchmarks,":[231],"5.0%":[233],"12.7%":[235],"various":[237],"queries":[238],"DSS":[241],"workload.":[242]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-23T05:10:03.516525","created_date":"2025-10-10T00:00:00"}