{"id":"https://openalex.org/W2033256404","doi":"https://doi.org/10.1145/1023833.1023870","title":"Procedure placement using temporal-ordering information","display_name":"Procedure placement using temporal-ordering information","publication_year":2004,"publication_date":"2004-09-22","ids":{"openalex":"https://openalex.org/W2033256404","doi":"https://doi.org/10.1145/1023833.1023870","mag":"2033256404"},"language":"en","primary_location":{"id":"doi:10.1145/1023833.1023870","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1023833.1023870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008882200","display_name":"Christophe Guillon","orcid":"https://orcid.org/0000-0001-8308-8682"},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Christophe Guillon","raw_affiliation_strings":["STMicroelectronics, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Grenoble, France","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089282120","display_name":"Fabrice Rastello","orcid":"https://orcid.org/0000-0002-6589-9956"},"institutions":[{"id":"https://openalex.org/I113428412","display_name":"\u00c9cole Normale Sup\u00e9rieure de Lyon","ror":"https://ror.org/04zmssz18","country_code":"FR","type":"education","lineage":["https://openalex.org/I113428412","https://openalex.org/I203339264"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Fabrice Rastello","raw_affiliation_strings":["\u00c9cole Normale Sup\u00e9rieure de Lyon, Lyon, France"],"affiliations":[{"raw_affiliation_string":"\u00c9cole Normale Sup\u00e9rieure de Lyon, Lyon, France","institution_ids":["https://openalex.org/I113428412"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070942823","display_name":"Thierry Bidault","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Thierry Bidault","raw_affiliation_strings":["STMicroelectronics, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Grenoble, France","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072761187","display_name":"Florent Bouchez","orcid":null},"institutions":[{"id":"https://openalex.org/I113428412","display_name":"\u00c9cole Normale Sup\u00e9rieure de Lyon","ror":"https://ror.org/04zmssz18","country_code":"FR","type":"education","lineage":["https://openalex.org/I113428412","https://openalex.org/I203339264"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Florent Bouchez","raw_affiliation_strings":["\u00c9cole Normale Sup\u00e9rieure de Lyon, Lyon, France"],"affiliations":[{"raw_affiliation_string":"\u00c9cole Normale Sup\u00e9rieure de Lyon, Lyon, France","institution_ids":["https://openalex.org/I113428412"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5008882200"],"corresponding_institution_ids":["https://openalex.org/I4210104693"],"apc_list":null,"apc_paid":null,"fwci":0.2633,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.55500457,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"268","last_page":"279"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.8383004665374756},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8186430931091309},{"id":"https://openalex.org/keywords/cache-oblivious-algorithm","display_name":"Cache-oblivious algorithm","score":0.7780795693397522},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7577893137931824},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.6522682309150696},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.6411507725715637},{"id":"https://openalex.org/keywords/modulo","display_name":"Modulo","score":0.6006166934967041},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.5566933155059814},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.5151580572128296},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.48784756660461426},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.43623220920562744},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4259384274482727},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.337672621011734},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13543006777763367},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.10233253240585327}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.8383004665374756},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8186430931091309},{"id":"https://openalex.org/C59687516","wikidata":"https://www.wikidata.org/wiki/Q5015938","display_name":"Cache-oblivious algorithm","level":5,"score":0.7780795693397522},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7577893137931824},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.6522682309150696},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.6411507725715637},{"id":"https://openalex.org/C54732982","wikidata":"https://www.wikidata.org/wiki/Q1415345","display_name":"Modulo","level":2,"score":0.6006166934967041},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.5566933155059814},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.5151580572128296},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.48784756660461426},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.43623220920562744},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4259384274482727},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.337672621011734},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13543006777763367},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.10233253240585327},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1023833.1023870","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1023833.1023870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1986022261","https://openalex.org/W1997649574","https://openalex.org/W2004976090","https://openalex.org/W2047430913","https://openalex.org/W2066670963","https://openalex.org/W2115191364","https://openalex.org/W2115971347","https://openalex.org/W2116672403","https://openalex.org/W2143474538","https://openalex.org/W2476096155","https://openalex.org/W2752885492","https://openalex.org/W3147835733","https://openalex.org/W4230660672","https://openalex.org/W7029321148"],"related_works":["https://openalex.org/W2098406302","https://openalex.org/W2734782074","https://openalex.org/W2546991807","https://openalex.org/W2538519144","https://openalex.org/W2121191383","https://openalex.org/W2076114130","https://openalex.org/W1505654810","https://openalex.org/W2535115842","https://openalex.org/W2436169747","https://openalex.org/W1584415117"],"abstract_inverted_index":{"In":[0,113],"a":[1,18,54,175],"direct-mapped":[2],"instruction":[3],"cache,":[4],"all":[5],"instructions":[6],"that":[7,45],"have":[8],"the":[9,14,65,72,86,95,103,109,119,122,132,144,149,161,167,182,187,201,204],"same":[10,202],"memory":[11,49,100],"address":[12],"modulo":[13,90,104],"cache":[15,22,25,150,196,211],"size,":[16,185],"share":[17],"common":[19],"and":[20,38,59,107,169,206],"unique":[21],"slot.":[23],"Instruction":[24],"conflicts":[26],"can":[27],"be":[28],"partially":[29],"handled":[30],"at":[31],"linked":[32],"time":[33],"by":[34,50,75],"procedure":[35],"placement.":[36],"Pettis":[37],"Hansen":[39],"give":[40],"in":[41,48,53],"[1]":[42],"an":[43,128,191],"algorithm":[44,61,130,171,189],"reorders":[46],"procedures":[47],"aggregating":[51],"them":[52],"greedy":[55],"fashion.":[56],"The":[57,80,195],"Gloy":[58,168,205],"Smith":[60,170,207],"[2]":[62],"greatly":[63],"decreases":[64],"number":[66,145],"of":[67,121,146,179,193],"con":[68],"ict-misses":[69],"but":[70],"increases":[71],"code":[73,110,176],"size":[74,111,157,177],"allowing":[76],"gaps":[77],"between":[78],"procedures.":[79],"latter":[81],"contains":[82],"two":[83],"main":[84],"stages:":[85],"cache-placement":[87,123,162],"phase":[88,97],"assigns":[89,98],"addresses":[91,101],"to":[92,131,166],"minimizes":[93,108],"cache-conflicts;":[94],"memory-placement":[96,133],"final":[99,155],"under":[102],"placement":[105],"constraints,":[106],"expansion.":[112],"this":[114],"paper:":[115],"(1)":[116],"we":[117,126,153],"state":[118],"NP-completeness":[120],"problem;":[124],"(2)":[125],"provide":[127],"optimal":[129],"problem":[134],"with":[135,209],"complexity":[136],"O(n":[137],"min(n;":[138],"L)":[139],"log*":[140],"(n))":[141],"(n":[142],"is":[143,199],"procedures,":[147],"L":[148],"size);":[151],"(3)":[152],"take":[154],"program":[156,184],"into":[158],"consideration":[159],"during":[160],"phase.":[163],"Our":[164],"modifications":[165],"gives":[172],"on":[173],"average":[174],"expansion":[178,192],"8%":[180],"over":[181],"original":[183],"while":[186],"initial":[188],"gave":[190],"177%.":[194],"miss":[197,212],"reduction":[198],"nearly":[200],"as":[203],"solution":[208],"35%":[210],"reduction.":[213]},"counts_by_year":[{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}