{"id":"https://openalex.org/W2148915977","doi":"https://doi.org/10.1145/1016568.1016632","title":"An improved synthesis method for low power hardwired FIR filters","display_name":"An improved synthesis method for low power hardwired FIR filters","publication_year":2004,"publication_date":"2004-09-04","ids":{"openalex":"https://openalex.org/W2148915977","doi":"https://doi.org/10.1145/1016568.1016632","mag":"2148915977"},"language":"en","primary_location":{"id":"doi:10.1145/1016568.1016632","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1016568.1016632","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th symposium on Integrated circuits and system design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006363516","display_name":"Vagner Rosa","orcid":"https://orcid.org/0000-0002-0430-7590"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Vagner S. Rosa","raw_affiliation_strings":["Informatics Inst. UFRGS, Porto Alegre, RS, Brazil"],"affiliations":[{"raw_affiliation_string":"Informatics Inst. UFRGS, Porto Alegre, RS, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074598853","display_name":"Eduardo Costa","orcid":"https://orcid.org/0009-0009-2731-8864"},"institutions":[{"id":"https://openalex.org/I110676245","display_name":"Universidade Cat\u00f3lica de Pelotas","ror":"https://ror.org/0376myh60","country_code":"BR","type":"education","lineage":["https://openalex.org/I110676245"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Eduardo Costa","raw_affiliation_strings":["Univ. Cat\u00f3lica de Pelotas, Pelotas, RS, Brazil"],"affiliations":[{"raw_affiliation_string":"Univ. Cat\u00f3lica de Pelotas, Pelotas, RS, Brazil","institution_ids":["https://openalex.org/I110676245"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039448613","display_name":"Jos\u00e9 Monteiro","orcid":"https://orcid.org/0000-0003-0603-2268"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Jos\u00e9 C. Monteiro","raw_affiliation_strings":["IST/INESC, Lisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"IST/INESC, Lisbon, Portugal","institution_ids":["https://openalex.org/I121345201"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046426137","display_name":"S\u00e9rgio Bampi","orcid":"https://orcid.org/0000-0002-9018-6309"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Sergio Bampi","raw_affiliation_strings":["Informatics Inst. - UFRGS, Porto Alegre, RS, Brazil"],"affiliations":[{"raw_affiliation_string":"Informatics Inst. - UFRGS, Porto Alegre, RS, Brazil","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5006363516"],"corresponding_institution_ids":["https://openalex.org/I130442723"],"apc_list":null,"apc_paid":null,"fwci":0.8571,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.75235011,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"237","last_page":"241"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.7907074689865112},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.6901434063911438},{"id":"https://openalex.org/keywords/rounding","display_name":"Rounding","score":0.6639890074729919},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.6005903482437134},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5874344706535339},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5442999601364136},{"id":"https://openalex.org/keywords/power-of-two","display_name":"Power of two","score":0.5176063776016235},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.5083674788475037},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.48424646258354187},{"id":"https://openalex.org/keywords/filter-design","display_name":"Filter design","score":0.440249502658844},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.4360717833042145},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.4351796507835388},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4165613651275635},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.33869460225105286},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.12182065844535828},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.10101386904716492}],"concepts":[{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.7907074689865112},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6901434063911438},{"id":"https://openalex.org/C136625980","wikidata":"https://www.wikidata.org/wiki/Q663208","display_name":"Rounding","level":2,"score":0.6639890074729919},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.6005903482437134},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5874344706535339},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5442999601364136},{"id":"https://openalex.org/C7720571","wikidata":"https://www.wikidata.org/wiki/Q1136880","display_name":"Power of two","level":2,"score":0.5176063776016235},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.5083674788475037},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.48424646258354187},{"id":"https://openalex.org/C22597639","wikidata":"https://www.wikidata.org/wiki/Q5449227","display_name":"Filter design","level":3,"score":0.440249502658844},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.4360717833042145},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.4351796507835388},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4165613651275635},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.33869460225105286},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.12182065844535828},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.10101386904716492},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1016568.1016632","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1016568.1016632","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th symposium on Integrated circuits and system design","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.97.382","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.97.382","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.inesc-id.pt/ficheiros/publicacoes/2066.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5400000214576721,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W17849359","https://openalex.org/W1555838724","https://openalex.org/W1578458555","https://openalex.org/W1965846060","https://openalex.org/W2119123290","https://openalex.org/W2119529071","https://openalex.org/W2127539731","https://openalex.org/W2148908637","https://openalex.org/W2166932875"],"related_works":["https://openalex.org/W2535419677","https://openalex.org/W934263769","https://openalex.org/W2134876043","https://openalex.org/W2476214559","https://openalex.org/W3039927303","https://openalex.org/W4388911419","https://openalex.org/W2118569990","https://openalex.org/W4322008031","https://openalex.org/W2544512391","https://openalex.org/W2389154333"],"abstract_inverted_index":{"This":[0,158],"work":[1],"presents":[2],"a":[3,35,82,89,123,139,166,179,208],"method":[4,33,222],"to":[5,46,136],"design":[6,226],"parallel":[7,228],"digital":[8],"finite":[9],"impulse":[10],"response":[11,141],"(FIR)":[12],"filters":[13,101],"for":[14,62,74,81,99,127,142,165,187,223],"hardwired":[15],"(fixed":[16],"coefficients)":[17],"implementation":[18],"with":[19,207],"reduced":[20],"number":[21,55,197],"of":[22,37,43,56,106,116,182,198,203,219,227],"adders":[23,199],"and":[24,65,102,138,177,200],"logic":[25,201],"depth":[26,202],"in":[27,58,185,195,211],"the":[28,41,44,53,76,114,117,149,152,155,175,183,196,204,212,217,220],"multiplier":[29,205],"block.":[30],"The":[31,130,190],"proposed":[32,221],"uses":[34],"combination":[36],"two":[38],"approaches:":[39],"first,":[40],"reduction":[42,194],"coefficients":[45,109,120],"N-Power-of-Two":[47],"(NPT)":[48],"terms,":[49],"where":[50],"N":[51],"is":[52,86,94,145,160],"maximum":[54],"bits":[57],"'1'":[59],"state":[60],"allowed":[61],"each":[63,128,143],"coefficient":[64,79,92,131],"Common":[66],"Subexpression":[67],"Elimination":[68],"(CSE)":[69],"among":[70,174],"multipliers.":[71],"An":[72],"algorithm":[73,153],"selecting":[75],"best":[77,156],"NPT":[78,137],"set":[80,93,144,159],"given":[83],"filter":[84,184,213],"specification":[85],"proposed.":[87],"Initially,":[88],"floating":[90,118],"point":[91,108,119],"generated":[95,111],"using":[96],"classical":[97],"methods":[98],"FIR":[100],"then":[103,134,161],"several":[104],"sets":[105,132],"fixed":[107],"are":[110,133],"by":[112,122],"rounding":[113],"result":[115],"multiplied":[121],"scale":[124],"factor":[125],"different":[126],"set.":[129,157],"converted":[135],"frequency":[140,150],"obtained.":[146],"Based":[147],"on":[148],"response,":[151],"selects":[154],"used":[162],"as":[163],"input":[164],"CSE":[167],"algorithm,":[168],"which":[169],"eliminate":[170],"all":[171],"common":[172],"subexpressions":[173],"multipliers":[176],"generates":[178],"hardware":[180],"description":[181],"VHDL":[186],"synthesis":[188],"purpose.":[189],"results":[191],"show":[192],"significant":[193],"block":[206],"minimal":[209],"degradation":[210],"transfer":[214],"characteristics,":[215],"showing":[216],"usefulness":[218],"low":[224],"power":[225],"filters.":[229]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
