{"id":"https://openalex.org/W2069543777","doi":"https://doi.org/10.1145/1016568.1016569","title":"Will the ASIC survive?","display_name":"Will the ASIC survive?","publication_year":2004,"publication_date":"2004-09-04","ids":{"openalex":"https://openalex.org/W2069543777","doi":"https://doi.org/10.1145/1016568.1016569","mag":"2069543777"},"language":"en","primary_location":{"id":"doi:10.1145/1016568.1016569","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1016568.1016569","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th symposium on Integrated circuits and system design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026067457","display_name":"Ra\u00fal Camposano","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":true,"raw_author_name":"Raul Camposano","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA","Synopsys, Inc. Mountain View, CA USA"],"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc. Mountain View, CA USA","institution_ids":["https://openalex.org/I1335490905"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5026067457"],"corresponding_institution_ids":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"],"apc_list":null,"apc_paid":null,"fwci":0.6583,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.71706504,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"5","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9157000184059143,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9157000184059143,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.9179761409759521},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6474981307983398},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5504492521286011},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5272176265716553},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.48878929018974304},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.45535802841186523},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4535863697528839},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4095219373703003},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.3016313910484314},{"id":"https://openalex.org/keywords/economics","display_name":"Economics","score":0.10357120633125305}],"concepts":[{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.9179761409759521},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6474981307983398},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5504492521286011},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5272176265716553},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.48878929018974304},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.45535802841186523},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4535863697528839},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4095219373703003},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3016313910484314},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.10357120633125305},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1016568.1016569","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1016568.1016569","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th symposium on Integrated circuits and system design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1485756991","https://openalex.org/W2376218453","https://openalex.org/W2070693700","https://openalex.org/W3200538824","https://openalex.org/W1561071093","https://openalex.org/W4295186528","https://openalex.org/W2097839191","https://openalex.org/W4389672975","https://openalex.org/W1965232212","https://openalex.org/W2109207559"],"abstract_inverted_index":{"ASIC":[0,25,74,125,200],"design":[1,18,26,60,72,101,126,171,189],"starts":[2],"have":[3,31,50,95],"declined":[4],"lately":[5],"and":[6,29,59,90,110,173],"many":[7],"voices":[8],"speak":[9],"of":[10,16,24,42,56,81,84,124,146,179,194],"fundamental":[11],"changes":[12],"as":[13],"a":[14,33,140,143,152],"result":[15],"increasing":[17,91],"costs,":[19],"predicting":[20],"even":[21],"the":[22,43,53,76,97,118,122,161,167,192],"extinction":[23],"altogether.":[27],"ASICs":[28],"ASSPs":[30],"been":[32,52],"formidable":[34],"economic":[35,154],"force,":[36],"accounting":[37],"for":[38,99],"over":[39],"one":[40],"third":[41],"semiconductor":[44],"market.":[45],"Standard":[46],"cell":[47],"based":[48],"designs":[49],"also":[51,174],"major":[54],"consumer":[55],"EDA":[57],"tools":[58],"technology.":[61],"However,":[62],"raising":[63],"NRE":[64],"costs":[65],"which":[66,112],"stand":[67],"at":[68,75,176],"approximately":[69],"$10M":[70],"to":[71,87,93,116,138,198],"an":[73],"130nm":[77],"technology":[78],"node,":[79],"cost":[80],"re-spins,":[82],"lack":[83],"flexibility":[85,193],"(compared":[86],"programmable":[88],"solutions)":[89],"time":[92],"market":[94],"prompted":[96],"search":[98],"other":[100],"styles.":[102],"These":[103,183],"include":[104],"structured":[105],"ASICs,":[106],"FPGAs,":[107],"processor":[108],"arrays":[109],"\"platforms\",":[111],"are":[113,150,186],"all":[114],"trying":[115],"fill":[117],"void":[119],"left":[120],"by":[121,190],"slowing":[123],"starts.":[127],"The":[128],"reality":[129],"however":[130],"is":[131],"that":[132],"none":[133],"has":[134],"so":[135],"far":[136],"proven":[137],"be":[139],"solution":[141],"with":[142],"wide":[144],"spectrum":[145],"applications,":[147],"because":[148,157],"they":[149],"either":[151],"limited":[153],"choice":[155],"or":[156],"their":[158],"performance":[159],"constraints":[160],"application":[162],"space.":[163],"This":[164],"presentation":[165],"addresses":[166],"trade-offs":[168],"among":[169],"these":[170,181],"solutions":[172,185,197],"looks":[175],"several":[177],"ways":[178],"mixing":[180],"technologies.":[182],"alternative":[184,196],"reviving":[187],"cell-based":[188],"adding":[191],"those":[195],"traditional":[199],"design.":[201]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}