{"id":"https://openalex.org/W2157504143","doi":"https://doi.org/10.1145/1013235.1013246","title":"Experimental measurement of a novel power gating structure with intermediate power saving mode","display_name":"Experimental measurement of a novel power gating structure with intermediate power saving mode","publication_year":2004,"publication_date":"2004-08-09","ids":{"openalex":"https://openalex.org/W2157504143","doi":"https://doi.org/10.1145/1013235.1013246","mag":"2157504143"},"language":"en","primary_location":{"id":"doi:10.1145/1013235.1013246","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1013235.1013246","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2004 international symposium on Low power electronics and design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080332152","display_name":"Suhwan Kim","orcid":"https://orcid.org/0000-0001-9107-2963"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Suhwan Kim","raw_affiliation_strings":["Seoul National Univestiy, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Seoul National Univestiy, Seoul, Korea","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029986931","display_name":"Stephen Kosonocky","orcid":"https://orcid.org/0009-0007-1656-8070"},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stephen V. Kosonocky","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060017483","display_name":"D.R. Knebel","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Daniel R. Knebel","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044532211","display_name":"Kevin Stawiasz","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kevin Stawiasz","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":69,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"20","last_page":"25"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.9639817476272583},{"id":"https://openalex.org/keywords/gating","display_name":"Gating","score":0.7725856304168701},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.7141149044036865},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5670695900917053},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.5630539655685425},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46075305342674255},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4319150447845459},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.4251975417137146},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4241662323474884},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.39925360679626465},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3438747525215149},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25004908442497253},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.227972149848938},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12179186940193176},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.09640902280807495},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09460291266441345}],"concepts":[{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.9639817476272583},{"id":"https://openalex.org/C194544171","wikidata":"https://www.wikidata.org/wiki/Q21105679","display_name":"Gating","level":2,"score":0.7725856304168701},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.7141149044036865},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5670695900917053},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.5630539655685425},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46075305342674255},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4319150447845459},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.4251975417137146},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4241662323474884},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.39925360679626465},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3438747525215149},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25004908442497253},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.227972149848938},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12179186940193176},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.09640902280807495},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09460291266441345},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C42407357","wikidata":"https://www.wikidata.org/wiki/Q521","display_name":"Physiology","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1013235.1013246","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1013235.1013246","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2004 international symposium on Low power electronics and design","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.324.71","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.324.71","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/islped04/pdffiles/p020.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7900000214576721,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1601793939","https://openalex.org/W1997896265","https://openalex.org/W2004934210","https://openalex.org/W2076469371","https://openalex.org/W2103123230","https://openalex.org/W2108989039","https://openalex.org/W2114621701","https://openalex.org/W2121225064","https://openalex.org/W2126416778","https://openalex.org/W2131121971","https://openalex.org/W2131862714","https://openalex.org/W2132406466","https://openalex.org/W2143171378","https://openalex.org/W2150526221","https://openalex.org/W2157080063","https://openalex.org/W2162051978"],"related_works":["https://openalex.org/W2259094912","https://openalex.org/W1987649265","https://openalex.org/W2371329481","https://openalex.org/W1966798817","https://openalex.org/W1551499744","https://openalex.org/W3147712429","https://openalex.org/W3127845477","https://openalex.org/W2938543345","https://openalex.org/W2105974726","https://openalex.org/W575537888"],"abstract_inverted_index":{"A":[0],"novel":[1],"power":[2,12,18,26,32,68],"gating":[3,13,33,69],"structure":[4,14],"is":[5],"proposed":[6],"for":[7],"low-power,":[8],"high-performance":[9],"VLSI.":[10],"This":[11],"supports":[15],"an":[16],"intermediate":[17,55],"saving":[19],"mode":[20],"as":[21,23],"well":[22],"a":[24],"traditional":[25],"cut-off":[27],"mode.":[28],"To":[29],"evaluate":[30],"our":[31],"structure,":[34],"we":[35],"design":[36],"and":[37],"fabricate":[38],"three":[39],"different":[40],"macros":[41],"in":[42],"0.13":[43],"um":[44],"CMOS":[45],"bulk":[46],"technology.":[47],"Our":[48],"measurement":[49],"results":[50],"show":[51],"that":[52],"the":[53],"additional":[54],"power-mode":[56],"allows":[57],"us":[58],"to":[59,66],"cover":[60],"various":[61],"power-performance":[62],"trade-off":[63],"regimes,":[64],"compared":[65],"conventional":[67],"structures.":[70]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":11},{"year":2012,"cited_by_count":4}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
