{"id":"https://openalex.org/W2060174822","doi":"https://doi.org/10.1142/s021812669700005x","title":"Power-Area Trade-Offs in Divided Word Line Memory Arrays","display_name":"Power-Area Trade-Offs in Divided Word Line Memory Arrays","publication_year":1997,"publication_date":"1997-02-01","ids":{"openalex":"https://openalex.org/W2060174822","doi":"https://doi.org/10.1142/s021812669700005x","mag":"2060174822"},"language":"en","primary_location":{"id":"doi:10.1142/s021812669700005x","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s021812669700005x","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023225287","display_name":"Meng\u2010Fan Chang","orcid":"https://orcid.org/0000-0001-6905-6350"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Meng-Fan Chang","raw_affiliation_strings":["Department of Computer Science  and Engineering, The Pennsylvania State University,  University Park, PA\u00a016802, USA","Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science  and Engineering, The Pennsylvania State University,  University Park, PA\u00a016802, USA","institution_ids":["https://openalex.org/I130769515"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802, USA","institution_ids":["https://openalex.org/I130769515"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112796358","display_name":"M.J. Irwin","orcid":null},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mary Jane Irwin","raw_affiliation_strings":["Department of Computer Science  and Engineering, The Pennsylvania State University,  University Park, PA\u00a016802, USA","Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science  and Engineering, The Pennsylvania State University,  University Park, PA\u00a016802, USA","institution_ids":["https://openalex.org/I130769515"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802, USA","institution_ids":["https://openalex.org/I130769515"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110454690","display_name":"R.M. Owens","orcid":null},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Robert Michael Owens","raw_affiliation_strings":["Department of Computer Science  and Engineering, The Pennsylvania State University,  University Park, PA\u00a016802, USA","Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science  and Engineering, The Pennsylvania State University,  University Park, PA\u00a016802, USA","institution_ids":["https://openalex.org/I130769515"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802, USA","institution_ids":["https://openalex.org/I130769515"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130769515"],"apc_list":null,"apc_paid":null,"fwci":0.3427,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.65927625,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"07","issue":"01","first_page":"49","last_page":"67"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/word","display_name":"Word (group theory)","score":0.722138524055481},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7076111435890198},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.6396817564964294},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.5305277109146118},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.5206736326217651},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.4931885600090027},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.4833678603172302},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4791509509086609},{"id":"https://openalex.org/keywords/conventional-memory","display_name":"Conventional memory","score":0.4763641357421875},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.4763486683368683},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4647476077079773},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.45680373907089233},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4374632239341736},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.43022334575653076},{"id":"https://openalex.org/keywords/computing-with-memory","display_name":"Computing with Memory","score":0.4221537709236145},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4196769893169403},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.352091908454895},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07163730263710022}],"concepts":[{"id":"https://openalex.org/C90805587","wikidata":"https://www.wikidata.org/wiki/Q10944557","display_name":"Word (group theory)","level":2,"score":0.722138524055481},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7076111435890198},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.6396817564964294},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.5305277109146118},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.5206736326217651},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.4931885600090027},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.4833678603172302},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4791509509086609},{"id":"https://openalex.org/C53838383","wikidata":"https://www.wikidata.org/wiki/Q541148","display_name":"Conventional memory","level":5,"score":0.4763641357421875},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.4763486683368683},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4647476077079773},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.45680373907089233},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4374632239341736},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.43022334575653076},{"id":"https://openalex.org/C152890283","wikidata":"https://www.wikidata.org/wiki/Q4129922","display_name":"Computing with Memory","level":5,"score":0.4221537709236145},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4196769893169403},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.352091908454895},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07163730263710022},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s021812669700005x","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s021812669700005x","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3048967625","https://openalex.org/W2056436264","https://openalex.org/W2561005478","https://openalex.org/W4248614727","https://openalex.org/W2296275612","https://openalex.org/W2612506697","https://openalex.org/W3200363193","https://openalex.org/W2965383127","https://openalex.org/W4365441141","https://openalex.org/W2060174822"],"abstract_inverted_index":{"Since":[0],"on-chip":[1],"caches":[2,17,35],"account":[3],"for":[4,23],"a":[5,84,182,198,212,228,251],"significant":[6,28],"portion":[7,29],"of":[8,12,30,34,45,49,144,160,211,227],"the":[9,31,39,46,50,56,61,73,78,100,106,118,122,128,133,141,155,190,209,225],"power":[10,16,32,47,129,158,191],"budget":[11],"modern":[13],"microprocessors,":[14],"low":[15],"are":[18,95,104],"needed":[19],"in":[20,83,92,105,250],"microprocessors":[21],"destined":[22],"portable":[24],"electronic":[25],"applications.":[26],"A":[27],"consumption":[33,48,130,159,192],"comes":[36,53],"from":[37,54],"accessing":[38],"cache":[40],"memory":[41,51,65,88,90,101,166,174,186,202,216,242,248],"array":[42,52,66,89,187,217],"and":[43,77,126,157,163,172],"most":[44],"driving":[55],"bit":[57,111],"line":[58,75,87,112,124,147,185,201,215,232,241],"pairs":[59,113],"(i.e.,":[60],"column":[62,79,134],"current).":[63,135],"Various":[64],"architectures":[67],"have":[68,109,253],"been":[69],"proposed":[70],"to":[71,195,221],"improve":[72],"word":[74,86,123,146,184,200,214,231,240],"delay":[76],"current.":[80],"For":[81],"example,":[82],"divided":[85,145,183,213,239],"cells":[91,102,175,249,263],"each":[93],"row":[94],"organized":[96],"into":[97],"blocks.":[98,152],"Only":[99],"which":[103],"activated":[107],"block":[108,252],"their":[110],"driven,":[114],"thus":[115],"both":[116],"improving":[117],"speed":[119],"(by":[120,131],"decreasing":[121,132],"delay)":[125],"lowering":[127],"In":[136],"this":[137],"paper":[138],"we":[139],"analyze":[140],"power-area":[142,255],"tradeoffs":[143],"memories":[148],"with":[149,168,244,259],"different":[150],"size":[151],"We":[153],"compare":[154],"area":[156,210,226],"16":[161,173],"Kbit":[162,165],"64":[164],"arrays":[167,243],"2,":[169],"4,":[170],"8,":[171],"per":[176,264],"block.":[177,265],"Our":[178,234],"experiments":[179,235],"show":[180],"that":[181,238],"can":[188,218],"lower":[189],"by":[193],"50%":[194],"90%":[196],"over":[197],"nondivided":[199,230],"array.":[203,233],"However,":[204],"they":[205],"consume":[206],"more":[207,260],"area;":[208],"be":[219],"15%":[220],"27%":[222],"larger":[223],"than":[224,257,261],"comparable":[229],"also":[236],"showed":[237],"two":[245],"or":[246],"four":[247,262],"better":[254],"product":[256],"those":[258]},"counts_by_year":[],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
