{"id":"https://openalex.org/W1969808316","doi":"https://doi.org/10.1142/s0218126696000364","title":"ULTRAHIGH DENSITY VLSI INNER PRODUCT COMPUTATIONS","display_name":"ULTRAHIGH DENSITY VLSI INNER PRODUCT COMPUTATIONS","publication_year":1996,"publication_date":"1996-10-01","ids":{"openalex":"https://openalex.org/W1969808316","doi":"https://doi.org/10.1142/s0218126696000364","mag":"1969808316"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126696000364","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126696000364","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112348165","display_name":"H.C. Card","orcid":null},"institutions":[{"id":"https://openalex.org/I46247651","display_name":"University of Manitoba","ror":"https://ror.org/02gfys938","country_code":"CA","type":"education","lineage":["https://openalex.org/I46247651"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"HOWARD CARD","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T5V6, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T5V6, Canada","institution_ids":["https://openalex.org/I46247651"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5112348165"],"corresponding_institution_ids":["https://openalex.org/I46247651"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.070285,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"06","issue":"05","first_page":"537","last_page":"546"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9909999966621399,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.859743595123291},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.7644031643867493},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.6497119069099426},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6187691688537598},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.5970327854156494},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5322083830833435},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5161536931991577},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.45897620916366577},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39289766550064087},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.368795245885849},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.36742743849754333},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.3291202485561371},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2983855605125427},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2819299101829529},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1771138310432434},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15870806574821472},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.13294267654418945},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07277560234069824}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.859743595123291},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.7644031643867493},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.6497119069099426},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6187691688537598},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.5970327854156494},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5322083830833435},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5161536931991577},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.45897620916366577},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39289766550064087},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.368795245885849},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.36742743849754333},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3291202485561371},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2983855605125427},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2819299101829529},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1771138310432434},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15870806574821472},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.13294267654418945},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07277560234069824},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126696000364","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126696000364","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.699999988079071}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2347486132","https://openalex.org/W2316789606","https://openalex.org/W2350340797","https://openalex.org/W2079984045","https://openalex.org/W4293224283","https://openalex.org/W2950501077","https://openalex.org/W2368601041","https://openalex.org/W2582182843","https://openalex.org/W2360060283","https://openalex.org/W2098218272"],"abstract_inverted_index":{"This":[0],"paper":[1],"discusses":[2],"some":[3],"of":[4,23,49,63],"the":[5,19,55],"limitations":[6],"to":[7,28,35,60],"matrix":[8],"computations":[9],"performed":[10],"by":[11,40,44],"special-purpose":[12],"VLSI":[13],"systems":[14],"on":[15,54],"a":[16,46],"chip":[17],"as":[18],"minimum":[20],"feature":[21],"size":[22],"CMOS":[24],"technology":[25],"is":[26],"reduced":[27],"below":[29],"1.0":[30],"\u00b5":[31],"m":[32],".":[33],"Limits":[34],"computation":[36],"rates":[37],"are":[38],"imposed":[39],"power":[41],"dissipation":[42],"and":[43],"having":[45],"maximum":[47],"number":[48],"pins":[50],"or":[51],"input/output":[52],"ports":[53],"package.":[56],"The":[57],"analysis":[58],"applies":[59],"regular":[61],"networks":[62],"array":[64],"multipliers":[65],"performing":[66],"binary":[67],"integer":[68],"arithmetic":[69],"at":[70],"various":[71],"bit":[72],"precisions.":[73]},"counts_by_year":[],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}