{"id":"https://openalex.org/W2082804010","doi":"https://doi.org/10.1142/s0218126695000163","title":"EFFICIENT DECIMATOR AND INTERPOLATOR ARRAY STRUCTURES","display_name":"EFFICIENT DECIMATOR AND INTERPOLATOR ARRAY STRUCTURES","publication_year":1995,"publication_date":"1995-06-01","ids":{"openalex":"https://openalex.org/W2082804010","doi":"https://doi.org/10.1142/s0218126695000163","mag":"2082804010"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126695000163","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126695000163","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061387916","display_name":"Esam Abdel\u2010Raheem","orcid":"https://orcid.org/0000-0001-7596-2077"},"institutions":[{"id":"https://openalex.org/I212119943","display_name":"University of Victoria","ror":"https://ror.org/04s5mat29","country_code":"CA","type":"education","lineage":["https://openalex.org/I212119943"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"ESAM ABDEL-RAHEEM","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Victoria, P. O. Box 3055, Victoria, B.C. V8W 3P6, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Victoria, P. O. Box 3055, Victoria, B.C. V8W 3P6, Canada","institution_ids":["https://openalex.org/I212119943"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060277652","display_name":"F. El-Guibaly","orcid":null},"institutions":[{"id":"https://openalex.org/I212119943","display_name":"University of Victoria","ror":"https://ror.org/04s5mat29","country_code":"CA","type":"education","lineage":["https://openalex.org/I212119943"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"FAYEZ EL-GUIBALY","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Victoria, P. O. Box 3055, Victoria, B.C. V8W 3P6, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Victoria, P. O. Box 3055, Victoria, B.C. V8W 3P6, Canada","institution_ids":["https://openalex.org/I212119943"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113512913","display_name":"A. Antoniou","orcid":null},"institutions":[{"id":"https://openalex.org/I212119943","display_name":"University of Victoria","ror":"https://ror.org/04s5mat29","country_code":"CA","type":"education","lineage":["https://openalex.org/I212119943"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"ANDREAS ANTONIOU","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Victoria, P. O. Box 3055, Victoria, B.C. V8W 3P6, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Victoria, P. O. Box 3055, Victoria, B.C. V8W 3P6, Canada","institution_ids":["https://openalex.org/I212119943"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I212119943"],"apc_list":null,"apc_paid":null,"fwci":0.4538,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.6736417,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"05","issue":"02","first_page":"215","last_page":"238"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/polyphase-system","display_name":"Polyphase system","score":0.9226258993148804},{"id":"https://openalex.org/keywords/infinite-impulse-response","display_name":"Infinite impulse response","score":0.7038239240646362},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5559256672859192},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5018472671508789},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4718627631664276},{"id":"https://openalex.org/keywords/interpolation","display_name":"Interpolation (computer graphics)","score":0.44513237476348877},{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.4416095018386841},{"id":"https://openalex.org/keywords/recursion","display_name":"Recursion (computer science)","score":0.43368375301361084},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.43195831775665283},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3670225739479065},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.3502178192138672},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.347547709941864},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2940623164176941},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.23781529068946838},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08826896548271179},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08412203192710876}],"concepts":[{"id":"https://openalex.org/C96157337","wikidata":"https://www.wikidata.org/wiki/Q391639","display_name":"Polyphase system","level":2,"score":0.9226258993148804},{"id":"https://openalex.org/C183816354","wikidata":"https://www.wikidata.org/wiki/Q665617","display_name":"Infinite impulse response","level":4,"score":0.7038239240646362},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5559256672859192},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5018472671508789},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4718627631664276},{"id":"https://openalex.org/C137800194","wikidata":"https://www.wikidata.org/wiki/Q11713455","display_name":"Interpolation (computer graphics)","level":3,"score":0.44513237476348877},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.4416095018386841},{"id":"https://openalex.org/C168773036","wikidata":"https://www.wikidata.org/wiki/Q264164","display_name":"Recursion (computer science)","level":2,"score":0.43368375301361084},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.43195831775665283},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3670225739479065},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.3502178192138672},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.347547709941864},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2940623164176941},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.23781529068946838},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08826896548271179},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08412203192710876},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126695000163","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126695000163","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3119395483","https://openalex.org/W2084441690","https://openalex.org/W4312785053","https://openalex.org/W2142009384","https://openalex.org/W2810377961","https://openalex.org/W2031892245","https://openalex.org/W3208746183","https://openalex.org/W2898725502","https://openalex.org/W2067214776","https://openalex.org/W2058863651"],"abstract_inverted_index":{"New":[0],"and":[1,9,12,17,74,95,124],"efficient":[2],"array":[3,62],"processor":[4],"implementations":[5],"of":[6,35,42,92,119],"polyphase":[7,56],"FIR":[8],"IIR":[10],"decimators":[11],"interpolators,":[13],"with":[14,105],"integer":[15],"compression":[16],"expansion":[18],"factors,":[19],"are":[20,58,64,70,76,88],"derived":[21,65],"using":[22],"an":[23],"algebraic":[24],"mapping":[25],"technique.":[26],"The":[27,49,98,113],"technique":[28],"is":[29,100],"based":[30],"on":[31,83],"the":[32,36,40,55,68,84,117],"time-domain":[33],"representation":[34],"algorithms.":[37,48],"It":[38],"has":[39],"merit":[41],"being":[43,120],"suitable":[44],"for":[45],"describing":[46],"multirate":[47],"control":[50],"signals":[51],"necessary":[52],"to":[53,102],"implement":[54],"structures":[57,63,115],"explicitly":[59],"identified.":[60],"Different":[61],"in":[66,90],"which":[67],"inputs":[69],"broadcast":[71],"or":[72,78],"pipelined":[73,77],"outputs":[75],"added":[79],"simultaneously.":[80],"Upper":[81],"bounds":[82],"input/output":[85],"processing":[86],"rates":[87],"provided":[89],"terms":[91],"system":[93],"parameters":[94],"hardware":[96,111],"delays.":[97],"work":[99],"extended":[101],"map":[103],"decimators/interpolators":[104],"fractional":[106],"compression/expansion":[107],"factors":[108],"onto":[109],"systolic":[110],"structures.":[112],"new":[114],"have":[116],"advantages":[118],"modular,":[121],"regular,":[122],"hierarchical,":[123],"pipelined.":[125]},"counts_by_year":[],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}