{"id":"https://openalex.org/W4407579926","doi":"https://doi.org/10.1142/s0218126625502287","title":"Low-Error ASIC Implementation of SoftMax Activation Function for Deep Neural Networks","display_name":"Low-Error ASIC Implementation of SoftMax Activation Function for Deep Neural Networks","publication_year":2025,"publication_date":"2025-02-15","ids":{"openalex":"https://openalex.org/W4407579926","doi":"https://doi.org/10.1142/s0218126625502287"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126625502287","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126625502287","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038278814","display_name":"Premananth Gowtham","orcid":"https://orcid.org/0000-0002-3138-1657"},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"P. Gowtham","raw_affiliation_strings":["School of Electronics Engineering, Vellore Institute of Technology, Chennai, Tamilnadu, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Vellore Institute of Technology, Chennai, Tamilnadu, India","institution_ids":["https://openalex.org/I876193797"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003872603","display_name":"John Sahaya Rani Alex","orcid":"https://orcid.org/0000-0003-0373-976X"},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"John Sahaya Rani Alex","raw_affiliation_strings":["School of Electronics Engineering, Vellore Institute of Technology, Chennai, Tamilnadu, India"],"raw_orcid":"https://orcid.org/0000-0003-0373-976X","affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Vellore Institute of Technology, Chennai, Tamilnadu, India","institution_ids":["https://openalex.org/I876193797"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5038278814"],"corresponding_institution_ids":["https://openalex.org/I876193797"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.01934248,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"34","issue":"10","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9775999784469604,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9775999784469604,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9613999724388123,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/softmax-function","display_name":"Softmax function","score":0.8307347297668457},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7866042852401733},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5914543271064758},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.5827208757400513},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.42181581258773804},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3944191634654999},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37669074535369873},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36640000343322754},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33442366123199463},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29913198947906494}],"concepts":[{"id":"https://openalex.org/C188441871","wikidata":"https://www.wikidata.org/wiki/Q7554146","display_name":"Softmax function","level":3,"score":0.8307347297668457},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7866042852401733},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5914543271064758},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.5827208757400513},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.42181581258773804},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3944191634654999},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37669074535369873},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36640000343322754},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33442366123199463},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29913198947906494}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126625502287","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126625502287","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1592017348","https://openalex.org/W1998824039","https://openalex.org/W2007339694","https://openalex.org/W2111013824","https://openalex.org/W2608093348","https://openalex.org/W2906917284","https://openalex.org/W2910396952","https://openalex.org/W2914968962","https://openalex.org/W3046387293","https://openalex.org/W3081066422","https://openalex.org/W4253012315"],"related_works":["https://openalex.org/W3107204728","https://openalex.org/W4287591324","https://openalex.org/W3108503355","https://openalex.org/W3090555870","https://openalex.org/W4226420367","https://openalex.org/W2962876041","https://openalex.org/W3022820045","https://openalex.org/W2801655600","https://openalex.org/W3005627584","https://openalex.org/W4303493643"],"abstract_inverted_index":{"Deep":[0],"Neural":[1],"Networks":[2],"(DNNs)":[3],"are":[4],"one":[5],"of":[6,20,28,74,81,129,137,184],"the":[7,36,75,121,153,159,168,173,178,194,199],"prominent":[8],"and":[9,45,65,96,106,123],"state-of-the-art":[10],"methods":[11],"for":[12,43,78,94],"implementing":[13],"artificial":[14],"intelligence":[15],"algorithms.":[16],"A":[17],"noticeable":[18],"amount":[19],"effort":[21],"has":[22],"been":[23],"put":[24],"into":[25],"hardware":[26,42],"acceleration":[27],"DNN,":[29],"with":[30,152,172,198,203],"significantly":[31],"less":[32,204],"attention":[33],"given":[34],"to":[35,108,157],"SoftMax":[37,48,76,155,175,183,201],"layer,":[38],"which":[39],"uses":[40],"expensive":[41],"exponentiation":[44],"division.":[46],"The":[47,99,164],"function":[49,77,202],"must":[50],"be":[51],"implemented":[52],"as":[53,55,181],"accurately":[54],"possible":[56],"since":[57],"it":[58],"is":[59,102,148],"crucial":[60],"in":[61,104,111,150,161],"multiclass":[62],"classification":[63,147],"training":[64],"inference":[66],"tasks.":[67],"This":[68,186],"paper":[69],"describes":[70],"an":[71],"efficient":[72],"implementation":[73],"error-sensitive":[79],"application":[80],"DNNs.":[82],"We":[83],"propose":[84],"a":[85,127],"Lookup":[86],"Table":[87],"(LUT)":[88],"based":[89],"on":[90],"linear":[91],"polynomial":[92],"approximation":[93],"exponential":[95],"log":[97],"units.":[98],"proposed":[100,154,174,200],"architecture":[101],"modeled":[103],"Verilog":[105],"synthesized":[107],"gate-level":[109],"netlist":[110],"GPDK180[Formula:":[112],"see":[113,117,131,144],"text]nm":[114],"using":[115],"Cadence[Formula:":[116],"text].":[118],"Results":[119],"after":[120],"placement":[122],"routing":[124],"stage":[125],"show":[126,166],"delay":[128],"7.15[Formula:":[130],"text]ns":[132],"while":[133],"consuming":[134],"5.3":[135],"mW":[136],"total":[138],"power":[139],"when":[140],"operated":[141],"at":[142],"100[Formula:":[143],"text]MHz.":[145],"Multiclass":[146],"coded":[149],"Python":[151],"layer":[156],"evaluate":[158],"accuracy":[160,180,196],"real-time":[162],"applications.":[163],"results":[165],"that":[167,188],"neural":[169],"network":[170],"trained":[171],"reaches":[176],"almost":[177],"same":[179,195],"traditional":[182],"86.76%.":[185],"proves":[187],"low-form":[189],"factor":[190],"platforms":[191],"can":[192],"implement":[193],"achieved":[197],"power.":[205]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-02-15T00:00:00"}
