{"id":"https://openalex.org/W4406246386","doi":"https://doi.org/10.1142/s0218126625501865","title":"Design of CML-Based Odd Frequency Divider Using Delay Cell for Low-Power Application","display_name":"Design of CML-Based Odd Frequency Divider Using Delay Cell for Low-Power Application","publication_year":2025,"publication_date":"2025-01-10","ids":{"openalex":"https://openalex.org/W4406246386","doi":"https://doi.org/10.1142/s0218126625501865"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126625501865","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126625501865","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056933550","display_name":"Lokenath Kundu","orcid":"https://orcid.org/0000-0001-9819-0292"},"institutions":[{"id":"https://openalex.org/I151903974","display_name":"National Institute Of Technology Silchar","ror":"https://ror.org/001ws2a36","country_code":"IN","type":"education","lineage":["https://openalex.org/I151903974"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Lokenath Kundu","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Silchar, Assam 788010, Silchar, India"],"raw_orcid":"https://orcid.org/0000-0001-9819-0292","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Silchar, Assam 788010, Silchar, India","institution_ids":["https://openalex.org/I151903974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009412835","display_name":"Subhanil Maity","orcid":"https://orcid.org/0000-0003-1866-5281"},"institutions":[{"id":"https://openalex.org/I100625452","display_name":"ON Semiconductor (United States)","ror":"https://ror.org/03nw6pt28","country_code":"US","type":"company","lineage":["https://openalex.org/I100625452"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Subhanil Maity","raw_affiliation_strings":["Semiconductor Business Unit, Cyient Ltd, Kolkata 700091, West Bengal, India"],"raw_orcid":"https://orcid.org/0000-0003-1866-5281","affiliations":[{"raw_affiliation_string":"Semiconductor Business Unit, Cyient Ltd, Kolkata 700091, West Bengal, India","institution_ids":["https://openalex.org/I100625452"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102731594","display_name":"Sourav Nath","orcid":"https://orcid.org/0000-0001-7093-4640"},"institutions":[{"id":"https://openalex.org/I151903974","display_name":"National Institute Of Technology Silchar","ror":"https://ror.org/001ws2a36","country_code":"IN","type":"education","lineage":["https://openalex.org/I151903974"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sourav Nath","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Silchar, Assam 788010, Silchar, India"],"raw_orcid":"https://orcid.org/0000-0001-7093-4640","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Silchar, Assam 788010, Silchar, India","institution_ids":["https://openalex.org/I151903974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016796601","display_name":"Gaurav Singh Baghel","orcid":"https://orcid.org/0000-0003-1107-1894"},"institutions":[{"id":"https://openalex.org/I151903974","display_name":"National Institute Of Technology Silchar","ror":"https://ror.org/001ws2a36","country_code":"IN","type":"education","lineage":["https://openalex.org/I151903974"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gaurav Singh Baghel","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Silchar, Assam 788010, Silchar, India"],"raw_orcid":"https://orcid.org/0000-0003-1107-1894","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Silchar, Assam 788010, Silchar, India","institution_ids":["https://openalex.org/I151903974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049961683","display_name":"Krishna Lal Baishnab","orcid":"https://orcid.org/0000-0002-2319-5707"},"institutions":[{"id":"https://openalex.org/I151903974","display_name":"National Institute Of Technology Silchar","ror":"https://ror.org/001ws2a36","country_code":"IN","type":"education","lineage":["https://openalex.org/I151903974"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"K. L. Baishnab","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Silchar, Assam 788010, Silchar, India"],"raw_orcid":"https://orcid.org/0000-0002-2319-5707","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Silchar, Assam 788010, Silchar, India","institution_ids":["https://openalex.org/I151903974"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3075,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.45704879,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"34","issue":"07","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9761000275611877,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9761000275611877,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9369999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9337999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.7444749474525452},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5230903625488281},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46229809522628784},{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.4334942698478699},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.42849284410476685},{"id":"https://openalex.org/keywords/power-dividers-and-directional-couplers","display_name":"Power dividers and directional couplers","score":0.3635921776294708},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33766794204711914},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27934369444847107},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.19386518001556396},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1632130742073059},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.12259325385093689}],"concepts":[{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.7444749474525452},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5230903625488281},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46229809522628784},{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.4334942698478699},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.42849284410476685},{"id":"https://openalex.org/C202988678","wikidata":"https://www.wikidata.org/wiki/Q1417986","display_name":"Power dividers and directional couplers","level":2,"score":0.3635921776294708},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33766794204711914},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27934369444847107},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.19386518001556396},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1632130742073059},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.12259325385093689},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126625501865","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126625501865","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8399999737739563,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1974337707","https://openalex.org/W2104924496","https://openalex.org/W2157641070","https://openalex.org/W2331468707","https://openalex.org/W2751501508","https://openalex.org/W2791742617","https://openalex.org/W2800076889","https://openalex.org/W2803036550","https://openalex.org/W2900151268","https://openalex.org/W2915710085","https://openalex.org/W2947664323","https://openalex.org/W2972260047","https://openalex.org/W2997389056","https://openalex.org/W3015733690","https://openalex.org/W3049382735","https://openalex.org/W3166246334","https://openalex.org/W3189059657","https://openalex.org/W3199704450","https://openalex.org/W4205518125","https://openalex.org/W4232734512","https://openalex.org/W4376614169","https://openalex.org/W4378647985","https://openalex.org/W4378676254","https://openalex.org/W4388487261"],"related_works":["https://openalex.org/W2148435004","https://openalex.org/W3095898867","https://openalex.org/W2478073082","https://openalex.org/W2786631194","https://openalex.org/W2230017267","https://openalex.org/W2137088108","https://openalex.org/W2072189049","https://openalex.org/W2152832053","https://openalex.org/W2613801068","https://openalex.org/W2099990255"],"abstract_inverted_index":{"The":[0,63,142],"presented":[1],"work":[2,151],"introduces":[3],"a":[4,8,26,127],"novel":[5],"approach":[6],"for":[7,79],"low-power,":[9],"area-optimized,":[10],"adjustable":[11],"current":[12],"mode":[13],"logic":[14],"(CML)-based":[15],"frequency":[16],"divider":[17],"(FD).":[18],"A":[19],"standalone":[20,97],"divide-by-3":[21],"FD,":[22],"divide-by-5":[23],"FD":[24,30,111],"and":[25,38,53,88,103,116,136,166],"dual":[27],"modulus":[28],"3/5":[29,110],"are":[31,34,124,140,145],"proposed":[32,42,96,122],"that":[33],"compatible":[35],"with":[36,147,172],"ZigBee":[37],"Bluetooth":[39],"standards.":[40],"These":[41,121],"architectures":[43],"utilize":[44],"delay":[45],"cells,":[46],"which":[47],"reduce":[48],"the":[49,56,61,95,148,173],"number":[50],"of":[51,60,82],"stages":[52],"thus":[54],"lower":[55],"overall":[57],"power":[58],"consumption":[59],"designs.":[62],"[Formula:":[64,68],"see":[65,69,72,74,93,101,106,114,118,130],"text]":[66,70],"over":[67],"([Formula:":[71],"text]/[Formula:":[73],"text])":[75],"methodology":[76],"is":[77],"explored":[78],"optimum":[80],"design":[81],"latches,":[83],"enabling":[84],"efficient":[85],"circuit":[86],"sizing":[87],"enhanced":[89],"performance.":[90],"At":[91],"2.4\u20132.8[Formula:":[92],"text]GHz,":[94],"FDs":[98],"consume":[99],"0.52\u20130.534[Formula:":[100],"text]mW":[102,115,119],"0.487\u20130.49":[104],"7[Formula:":[105],"text]mW,":[107],"respectively,":[108],"while":[109],"consumes":[112],"0.565\u20130.570[Formula:":[113],"0.564\u20130.575[Formula:":[117],"power.":[120],"designs":[123],"implemented":[125],"using":[126],"TSMC":[128],"65[Formula:":[129],"text]nm":[131],"CMOS":[132],"process":[133],"technology":[134],"node,":[135],"post-layout":[137],"simulated":[138],"results":[139],"presented.":[141],"recent":[143],"works":[144],"compared":[146],"performances.":[149],"This":[150],"entails":[152],"statistical":[153],"analysis":[154],"(Monte":[155],"Carlo":[156],"(MC))":[157],"as":[158,160],"well":[159],"variations":[161],"in":[162,170],"process,":[163],"supply":[164],"voltage":[165],"temperature":[167],"(PVT":[168],"analysis)":[169],"accordance":[171],"AEC-Q100":[174],"standard":[175],"(Grade":[176],"1).":[177]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}
