{"id":"https://openalex.org/W4403503752","doi":"https://doi.org/10.1142/s0218126625501245","title":"BP-IMCA: An Energy-Efficient 8T SRAM-Based Bit-Parallel In-Memory Computing Architecture","display_name":"BP-IMCA: An Energy-Efficient 8T SRAM-Based Bit-Parallel In-Memory Computing Architecture","publication_year":2024,"publication_date":"2024-10-18","ids":{"openalex":"https://openalex.org/W4403503752","doi":"https://doi.org/10.1142/s0218126625501245"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126625501245","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126625501245","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035923268","display_name":"Anil Rajput","orcid":"https://orcid.org/0000-0002-3876-5514"},"institutions":[{"id":"https://openalex.org/I9747756","display_name":"Atal Bihari Vajpayee Indian Institute of Information Technology and Management","ror":"https://ror.org/008b3ap06","country_code":"IN","type":"education","lineage":["https://openalex.org/I9747756"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anil Kumar Rajput","raw_affiliation_strings":["VLSI Research Group, ABV-IIITM, Gwalior, India"],"raw_orcid":"https://orcid.org/0000-0002-3876-5514","affiliations":[{"raw_affiliation_string":"VLSI Research Group, ABV-IIITM, Gwalior, India","institution_ids":["https://openalex.org/I9747756"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038140573","display_name":"Manisha Pattanaik","orcid":"https://orcid.org/0000-0001-7842-0695"},"institutions":[{"id":"https://openalex.org/I9747756","display_name":"Atal Bihari Vajpayee Indian Institute of Information Technology and Management","ror":"https://ror.org/008b3ap06","country_code":"IN","type":"education","lineage":["https://openalex.org/I9747756"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manisha Pattanaik","raw_affiliation_strings":["VLSI Research Group, ABV-IIITM, Gwalior, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Research Group, ABV-IIITM, Gwalior, India","institution_ids":["https://openalex.org/I9747756"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041305093","display_name":"Gaurav Kaushal","orcid":"https://orcid.org/0000-0002-7278-1104"},"institutions":[{"id":"https://openalex.org/I9747756","display_name":"Atal Bihari Vajpayee Indian Institute of Information Technology and Management","ror":"https://ror.org/008b3ap06","country_code":"IN","type":"education","lineage":["https://openalex.org/I9747756"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gaurav Kaushal","raw_affiliation_strings":["VLSI Research Group, ABV-IIITM, Gwalior, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Research Group, ABV-IIITM, Gwalior, India","institution_ids":["https://openalex.org/I9747756"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I9747756"],"apc_list":null,"apc_paid":null,"fwci":0.395,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.58497814,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"34","issue":"05","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6709121465682983},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6506450176239014},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6140093803405762},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.46303969621658325},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.44837814569473267},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40966492891311646},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3388385772705078},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3243752121925354},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32199007272720337},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3038018047809601},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15483221411705017},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.13490641117095947},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10659372806549072}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6709121465682983},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6506450176239014},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6140093803405762},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.46303969621658325},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.44837814569473267},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40966492891311646},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3388385772705078},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3243752121925354},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32199007272720337},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3038018047809601},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15483221411705017},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.13490641117095947},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10659372806549072},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126625501245","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126625501245","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8700000047683716,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W2160155552","https://openalex.org/W2331783522","https://openalex.org/W2591601611","https://openalex.org/W2613569094","https://openalex.org/W2771238178","https://openalex.org/W2793009352","https://openalex.org/W2904299207","https://openalex.org/W2946111674","https://openalex.org/W2949303365","https://openalex.org/W2976137532","https://openalex.org/W3011368285","https://openalex.org/W3047329656","https://openalex.org/W3048581975","https://openalex.org/W3083136971","https://openalex.org/W3085521240","https://openalex.org/W3091826466","https://openalex.org/W3162396228","https://openalex.org/W3191277520","https://openalex.org/W3205108079","https://openalex.org/W4226402784","https://openalex.org/W4292169167","https://openalex.org/W4294755145","https://openalex.org/W4316035036","https://openalex.org/W4367302043","https://openalex.org/W4385444588"],"related_works":["https://openalex.org/W4392590355","https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W1976168335","https://openalex.org/W2109451123","https://openalex.org/W2411923897","https://openalex.org/W4378977321","https://openalex.org/W3211992815"],"abstract_inverted_index":{"In-Memory":[0,55],"Computing":[1],"(IMC)":[2],"is":[3,51,97,140,167,200],"an":[4,214],"emerging":[5],"paradigm":[6],"that":[7],"aims":[8],"to":[9,53,70,99,128,142,172,243],"shift":[10],"computational":[11],"workload":[12],"away":[13],"from":[14,21,68,105],"CPUs.":[15],"The":[16,72,185,206],"bit-serial":[17],"IMC":[18,38,115,158,175,246],"architecture":[19,116,176,235],"suffers":[20],"larger":[22],"latency":[23],"when":[24],"performing":[25],"logic":[26,203],"and":[27,60,87,145,152,192,209,220,228],"arithmetic":[28],"operations.":[29,89,125,205],"In":[30,126],"this":[31],"paper,":[32],"a":[33,130,161,178],"general-purpose,":[34],"energy-efficient":[35],"Bit":[36],"Parallel":[37],"Architecture":[39],"(BP-IMCA)":[40],"based":[41],"on":[42],"Area-Optimized":[43],"(AO-8T)":[44],"static":[45],"random":[46],"access":[47],"memory":[48],"(SRAM)":[49],"bit-cell":[50,81],"proposed":[52,98,114,141,157,234],"perform":[54],"Boolean":[56],"Logic":[57],"Computation":[58],"(IMBC)":[59,204],"Near-Memory":[61],"Arithmetic":[62],"(NMA)":[63],"operations":[64,154,212],"with":[65],"variable":[66],"bit-width":[67],"1-":[69],"8-bit.":[71],"decoupled":[73],"read/write":[74],"paths":[75],"of":[76,112,181,188,196,217,240],"the":[77,101,109,113,156,174,233,237,244],"employed":[78],"AO-8T":[79],"SRAM":[80,165],"eliminate":[82],"compute":[83],"disturbance":[84],"during":[85,202],"IMBC":[86,124,153],"NMA":[88],"A":[90],"self-terminating":[91],"read":[92,151],"word":[93],"line":[94],"decoding":[95],"scheme":[96],"disconnect":[100],"RBL":[102],"discharging":[103],"path":[104],"GND,":[106],"which":[107],"decreases":[108],"energy":[110,194,215],"consumption":[111,195],"by":[117],"27.71%":[118],"at":[119,177,224],"1[Formula:":[120,182,225],"see":[121,132,163,183,190,198,226,230],"text]V":[122,227],"for":[123,148],"addition":[127,208],"this,":[129],"[Formula:":[131],"text]-based":[133],"Low-offset":[134],"Symmetric":[135],"Differential":[136],"Sense":[137],"Amplifier":[138],"(LSDSA)":[139],"achieve":[143,213],"fast":[144],"reliable":[146],"sensing":[147],"both":[149],"normal":[150],"in":[155,169],"architecture.":[159],"Further,":[160],"4[Formula:":[162],"text]Kb":[164],"array":[166],"implemented":[168],"65-nm":[170],"technology":[171],"analyze":[173],"supply":[179],"voltage":[180],"text]V.":[184],"operating":[186],"frequency":[187],"1,355[Formula:":[189],"text]MHz":[191],"average":[193],"7.04[Formula:":[197],"text]fJ/bit":[199],"achieved":[201],"8-bit":[207,210],"multiplication":[211],"efficiency":[216],"11.1":[218],"TOPS/W":[219],"2.28":[221],"TOPS/W,":[222],"respectively,":[223],"970[Formula:":[229],"text]MHz.":[231],"Cumulatively,":[232],"achieves":[236],"lowest":[238],"figure":[239],"merit":[241],"compared":[242],"state-of-the-art":[245],"architectures.":[247]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}