{"id":"https://openalex.org/W4360869504","doi":"https://doi.org/10.1142/s0218126623502730","title":"An Optimal Partitioning and Floor Planning for VLSI Circuit Design Based on a Hybrid Bio-Inspired Whale Optimization and Adaptive Bird Swarm Optimization (WO-ABSO) Algorithm","display_name":"An Optimal Partitioning and Floor Planning for VLSI Circuit Design Based on a Hybrid Bio-Inspired Whale Optimization and Adaptive Bird Swarm Optimization (WO-ABSO) Algorithm","publication_year":2023,"publication_date":"2023-03-24","ids":{"openalex":"https://openalex.org/W4360869504","doi":"https://doi.org/10.1142/s0218126623502730"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126623502730","is_oa":true,"landing_page_url":"https://doi.org/10.1142/s0218126623502730","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.1142/s0218126623502730","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"R. Karthick","orcid":"https://orcid.org/0000-0002-8485-901X"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"R. Karthick","raw_affiliation_strings":["Department of Computer Science and Engineering, K.L.N. College of Engineering, Pottapalayam, Sivagangai-630612, Tamil Nadu, India"],"raw_orcid":"https://orcid.org/0000-0002-8485-901X","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, K.L.N. College of Engineering, Pottapalayam, Sivagangai-630612, Tamil Nadu, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021921751","display_name":"A. Senthilselvi","orcid":null},"institutions":[{"id":"https://openalex.org/I145286018","display_name":"SRM Institute of Science and Technology","ror":"https://ror.org/050113w36","country_code":"IN","type":"education","lineage":["https://openalex.org/I145286018"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"A. Senthilselvi","raw_affiliation_strings":["Department of Computer Science and Engineering, SRM Institute of Science and Technology, Ramapuram Campus, Chennai, Tamil Nadu, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, SRM Institute of Science and Technology, Ramapuram Campus, Chennai, Tamil Nadu, India","institution_ids":["https://openalex.org/I145286018"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065244620","display_name":"P. Meenalochini","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"P. Meenalochini","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Sethu Institute of Technology Kariapatti, Pulloor, Virudhunagar-626115, Tamil Nadu, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Sethu Institute of Technology Kariapatti, Pulloor, Virudhunagar-626115, Tamil Nadu, India","institution_ids":[]}]},{"author_position":"last","author":{"id":null,"display_name":"S Senthil Pandi","orcid":null},"institutions":[{"id":"https://openalex.org/I4399657946","display_name":"Rajalakshmi Engineering College","ror":"https://ror.org/01dw2vm55","country_code":null,"type":"education","lineage":["https://openalex.org/I4399657946"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"S Senthil Pandi","raw_affiliation_strings":["Department of Computer Science and Engineering, Rajalakshmi Engineering College, Thandalam, Chennai, Tamil Nadu, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Rajalakshmi Engineering College, Thandalam, Chennai, Tamil Nadu, India","institution_ids":["https://openalex.org/I4399657946"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":7.0831,"has_fulltext":false,"cited_by_count":58,"citation_normalized_percentile":{"value":0.97722111,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":100},"biblio":{"volume":"32","issue":"08","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8054320812225342},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6632879972457886},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6036557555198669},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5759106278419495},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5420485734939575},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.5009949207305908},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.43156689405441284},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.4115004539489746},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.3795512914657593},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24299699068069458},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09111902117729187}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8054320812225342},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6632879972457886},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6036557555198669},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5759106278419495},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5420485734939575},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.5009949207305908},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43156689405441284},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4115004539489746},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3795512914657593},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24299699068069458},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09111902117729187},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126623502730","is_oa":true,"landing_page_url":"https://doi.org/10.1142/s0218126623502730","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1142/s0218126623502730","is_oa":true,"landing_page_url":"https://doi.org/10.1142/s0218126623502730","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","id":"https://metadata.un.org/sdg/11","score":0.49000000953674316}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W1982201310","https://openalex.org/W2071575532","https://openalex.org/W2094199735","https://openalex.org/W2553852618","https://openalex.org/W2574415989","https://openalex.org/W2580709124","https://openalex.org/W2768426991","https://openalex.org/W2790851819","https://openalex.org/W2804811485","https://openalex.org/W2909318183","https://openalex.org/W3005122707","https://openalex.org/W3005333523","https://openalex.org/W3016538482","https://openalex.org/W3028153942","https://openalex.org/W3033396344","https://openalex.org/W3038151853","https://openalex.org/W3092426797","https://openalex.org/W3097860718","https://openalex.org/W3111241217","https://openalex.org/W3119660133","https://openalex.org/W3119990280","https://openalex.org/W3121556058","https://openalex.org/W3128504966","https://openalex.org/W3128624676","https://openalex.org/W3129292293","https://openalex.org/W3131218048","https://openalex.org/W3131938790","https://openalex.org/W3135783347","https://openalex.org/W3139358888","https://openalex.org/W3145003319","https://openalex.org/W3157768705","https://openalex.org/W3158141941","https://openalex.org/W3168376698","https://openalex.org/W3173619368","https://openalex.org/W3175489599","https://openalex.org/W3198489621","https://openalex.org/W3208251938","https://openalex.org/W4200084002","https://openalex.org/W4200566954","https://openalex.org/W4220857461"],"related_works":["https://openalex.org/W2081032080","https://openalex.org/W2134733504","https://openalex.org/W2144460576","https://openalex.org/W2181385951","https://openalex.org/W1727049600","https://openalex.org/W2183812348","https://openalex.org/W1481897060","https://openalex.org/W4313890168","https://openalex.org/W2358255476","https://openalex.org/W3015807029"],"abstract_inverted_index":{"Partitioning":[0,108],"and":[1,14,25,53,68,99,109,123,167,180,215],"Floor":[2,100,110],"Planning":[3,111],"are":[4,15,29,130],"two":[5],"of":[6,21,37,49,134,199],"the":[7,11,19,22,30,51,59,65,71,94,113,140,145,151,170,181,221],"design":[8,13,35,45,79],"processes":[9],"in":[10,42,103,155],"VLSI":[12,43,114],"used":[16],"to":[17,57,69],"reduce":[18],"size":[20],"circuit.":[23],"Area":[24],"interconnect":[26,54],"length":[27,55,154],"reduction":[28],"key":[31],"goals":[32],"for":[33,77,97,112,138,142,147],"physical":[34,44,78],"automation":[36],"very":[38],"large-scale":[39],"integration":[40],"chips":[41],"optimization.":[46],"The":[47,88,132,190,205],"aim":[48],"decreasing":[50,139,144,150],"area":[52,146],"is":[56,174,185],"decrease":[58],"integrated":[60],"chip\u2019s":[61],"size.":[62],"To":[63],"achieve":[64,70],"above":[66],"objective":[67],"aforementioned":[72],"goal,":[73],"an":[74,106],"ideal":[75],"solution":[76],"components,":[80],"like":[81],"partitioning,":[82,143],"floor":[83,148,156,182],"planning":[84,157,183],"must":[85],"be":[86],"found.":[87],"existing":[89,222],"methods":[90],"did":[91],"not":[92],"provide":[93],"sufficient":[95],"results":[96],"Partition":[98],"Plan.":[101],"Therefore,":[102],"this":[104],"paper,":[105],"Optimal":[107],"Circuit":[115],"Design":[116],"based":[117],"on":[118,161],"Hybrid":[119],"Bio-inspired":[120],"Whale":[121],"Optimization":[122,127],"Adaptive":[124],"Bird":[125],"Swarm":[126],"(WO-ABSO)":[128],"Algorithm":[129],"proposed.":[131],"goal":[133],"hybrid":[135,207],"WO-ABSO":[136,208],"algorithm":[137,179,209],"delay":[141],"planning,":[149],"delay,":[152,214],"wire":[153],"has":[158],"indefinite":[159],"influence":[160],"other":[162],"criteria,":[163],"such":[164],"as":[165],"power":[166,217],"speed.":[168],"Here,":[169],"circuit":[171],"partitioning":[172],"problem":[173,184],"optimized":[175,186],"using":[176],"whale":[177],"optimization":[178],"under":[187],"ABSO":[188],"algorithm.":[189],"benchmark":[191,203],"tests":[192],"included":[193],"test":[194],"cases":[195],"from":[196],"Microelectronics":[197],"Center":[198],"North":[200],"Carolina":[201],"(MCNC)":[202],"circuits.":[204],"proposed":[206],"attains":[210],"lower":[211,213,216],"area,":[212],"usage":[218],"compared":[219],"with":[220],"methods.":[223]},"counts_by_year":[{"year":2026,"cited_by_count":5},{"year":2025,"cited_by_count":26},{"year":2024,"cited_by_count":21},{"year":2023,"cited_by_count":6}],"updated_date":"2026-06-17T08:01:34.144755","created_date":"2025-10-10T00:00:00"}
