{"id":"https://openalex.org/W4323854294","doi":"https://doi.org/10.1142/s0218126623502559","title":"High-Performance Multi-RNS-Assisted Concurrent RSA Cryptosystem Architectures","display_name":"High-Performance Multi-RNS-Assisted Concurrent RSA Cryptosystem Architectures","publication_year":2023,"publication_date":"2023-03-10","ids":{"openalex":"https://openalex.org/W4323854294","doi":"https://doi.org/10.1142/s0218126623502559"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126623502559","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126623502559","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074617135","display_name":"S. Elango","orcid":"https://orcid.org/0000-0002-4608-1358"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"S. Elango","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Tamil Nadu 638401, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Tamil Nadu 638401, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047566907","display_name":"P. Sampath","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133257","display_name":"KPR Institute of Engineering and Technology","ror":"https://ror.org/02q9f3a53","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210133257"]},{"id":"https://openalex.org/I4387155059","display_name":"Dr. N.G.P. Institute of Technology","ror":"https://ror.org/02dfe8754","country_code":null,"type":"education","lineage":["https://openalex.org/I4387155059"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"P. Sampath","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Dr. N.G.P Institute of Technology, Coimbatore, Tamil Nadu 641048, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Dr. N.G.P Institute of Technology, Coimbatore, Tamil Nadu 641048, India","institution_ids":["https://openalex.org/I4210133257","https://openalex.org/I4387155059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070133393","display_name":"S. Raja Sekar","orcid":"https://orcid.org/0000-0002-2546-1407"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Raja Sekar","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Tamil Nadu 638401, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Tamil Nadu 638401, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060081591","display_name":"Sajan P. Philip","orcid":"https://orcid.org/0000-0003-4308-6396"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sajan P Philip","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Tamil Nadu 638401, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Tamil Nadu 638401, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035635830","display_name":"A. Danielraj","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"A. Danielraj","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Tamil Nadu 638401, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Tamil Nadu 638401, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5074617135"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6627,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.73723648,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"32","issue":"15","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10237","display_name":"Cryptography and Data Security","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/modular-exponentiation","display_name":"Modular exponentiation","score":0.7511798143386841},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.674033522605896},{"id":"https://openalex.org/keywords/cryptosystem","display_name":"Cryptosystem","score":0.664310872554779},{"id":"https://openalex.org/keywords/public-key-cryptography","display_name":"Public-key cryptography","score":0.6299440264701843},{"id":"https://openalex.org/keywords/modular-arithmetic","display_name":"Modular arithmetic","score":0.5869467258453369},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.5722393989562988},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.49025824666023254},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4463137090206146},{"id":"https://openalex.org/keywords/key-size","display_name":"Key size","score":0.44508713483810425},{"id":"https://openalex.org/keywords/modulo","display_name":"Modulo","score":0.4449785649776459},{"id":"https://openalex.org/keywords/key-generation","display_name":"Key generation","score":0.42468178272247314},{"id":"https://openalex.org/keywords/residue-number-system","display_name":"Residue number system","score":0.4238245487213135},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42127490043640137},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4042295217514038},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.3947611153125763},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.38450199365615845},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2217540144920349},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2089703381061554},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.12292474508285522},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08575651049613953}],"concepts":[{"id":"https://openalex.org/C152763109","wikidata":"https://www.wikidata.org/wiki/Q1228841","display_name":"Modular exponentiation","level":4,"score":0.7511798143386841},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.674033522605896},{"id":"https://openalex.org/C6295992","wikidata":"https://www.wikidata.org/wiki/Q976521","display_name":"Cryptosystem","level":3,"score":0.664310872554779},{"id":"https://openalex.org/C203062551","wikidata":"https://www.wikidata.org/wiki/Q201339","display_name":"Public-key cryptography","level":3,"score":0.6299440264701843},{"id":"https://openalex.org/C32049820","wikidata":"https://www.wikidata.org/wiki/Q319400","display_name":"Modular arithmetic","level":3,"score":0.5869467258453369},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.5722393989562988},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.49025824666023254},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4463137090206146},{"id":"https://openalex.org/C47750902","wikidata":"https://www.wikidata.org/wiki/Q1557574","display_name":"Key size","level":4,"score":0.44508713483810425},{"id":"https://openalex.org/C54732982","wikidata":"https://www.wikidata.org/wiki/Q1415345","display_name":"Modulo","level":2,"score":0.4449785649776459},{"id":"https://openalex.org/C163173736","wikidata":"https://www.wikidata.org/wiki/Q3308558","display_name":"Key generation","level":3,"score":0.42468178272247314},{"id":"https://openalex.org/C71480937","wikidata":"https://www.wikidata.org/wiki/Q3086516","display_name":"Residue number system","level":2,"score":0.4238245487213135},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42127490043640137},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4042295217514038},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.3947611153125763},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.38450199365615845},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2217540144920349},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2089703381061554},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.12292474508285522},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08575651049613953},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126623502559","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126623502559","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1504599740","https://openalex.org/W1965469050","https://openalex.org/W2014241426","https://openalex.org/W2017253568","https://openalex.org/W2029693536","https://openalex.org/W2087096176","https://openalex.org/W2094537264","https://openalex.org/W2095410905","https://openalex.org/W2098282500","https://openalex.org/W2108834246","https://openalex.org/W2126182229","https://openalex.org/W2152025668","https://openalex.org/W2277094899","https://openalex.org/W2496360257","https://openalex.org/W2512350220","https://openalex.org/W2530710018","https://openalex.org/W2554091707","https://openalex.org/W2627046244","https://openalex.org/W2750463165","https://openalex.org/W2807345858","https://openalex.org/W2957731207","https://openalex.org/W3004434744","https://openalex.org/W3176863806","https://openalex.org/W3189841201","https://openalex.org/W4224274135","https://openalex.org/W4226531480"],"related_works":["https://openalex.org/W3182915524","https://openalex.org/W1973181769","https://openalex.org/W1553103133","https://openalex.org/W2003650234","https://openalex.org/W824246372","https://openalex.org/W2118678344","https://openalex.org/W2382634160","https://openalex.org/W2004447057","https://openalex.org/W2356031580","https://openalex.org/W3172000364"],"abstract_inverted_index":{"In":[0],"public-key":[1,46],"cryptography,":[2],"the":[3,15,31,35,50,58,65,76,95,134,144,165,184],"RSA":[4,21,45,59,83,97,131,175],"algorithm":[5,23,60],"is":[6,61,91,150,181],"an":[7,44,151],"inevitable":[8],"part":[9],"of":[10,14,17,34,107,174],"hardware":[11],"security":[12],"because":[13],"ease":[16],"implementation":[18],"and":[19,71,99,127,139,158,170],"security.":[20],"Cryptographic":[22],"uses":[24],"many":[25],"modular":[26,69],"arithmetic":[27],"operations":[28],"that":[29],"decide":[30],"overall":[32],"performance":[33,118],"architecture.":[36],"This":[37],"paper":[38],"proposes":[39],"VLSI":[40],"architecture":[41,98],"to":[42,93],"implement":[43],"cryptosystem":[47],"driven":[48],"by":[49,63,137],"Residue":[51],"Number":[52],"System":[53],"(RNS).":[54],"Modular":[55],"exponentiation":[56],"in":[57,79,101,153,167],"executed":[62],"dividing":[64],"entire":[66,96],"process":[67],"into":[68],"squaring":[70],"multiplication":[72],"operations.":[73],"Based":[74],"on":[75],"RNS":[77,125,129],"employment":[78],"modulo-exponential":[80],"operation,":[81],"two":[82],"architectures":[84,132],"are":[85],"proposed.":[86],"A":[87],"Verilog":[88],"HDL":[89],"code":[90],"used":[92],"model":[94],"ported":[100],"Zynq":[102],"FPGA":[103],"(XC7Z020CLG484-1)":[104],"for":[105,119,160,176],"Proof":[106],"Concept":[108],"(PoC).":[109],"The":[110],"Cadence":[111],"Genus":[112],"Synthesizer":[113],"tool":[114],"characterizes":[115],"a":[116,161,177],"system\u2019s":[117],"TSMCs":[120],"standard":[121],"Cell":[122],"library.":[123],"Partial":[124],"(Proposed-I)-":[126],"Fully":[128],"(Proposed-II)-based":[130],"increase":[133,152],"operation":[135],"speed":[136,173],"13%":[138],"35%,":[140],"respectively,":[141],"compared":[142],"with":[143],"existing":[145],"RSA.":[146],"Even":[147],"though":[148],"there":[149],"parameters":[154],"like":[155],"area,":[156],"power":[157],"PDP":[159],"smaller":[162],"key":[163,179],"size,":[164],"improvement":[166],"area":[168],"utilization":[169],"encryption/":[171],"decryption":[172],"larger":[178],"size":[180],"evident":[182],"from":[183],"analysis.":[185]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}