{"id":"https://openalex.org/W4303449325","doi":"https://doi.org/10.1142/s021812662350113x","title":"Design and Lifetime Estimation of Low-Power 6-Input Look-Up Table Used in Modern FPGA","display_name":"Design and Lifetime Estimation of Low-Power 6-Input Look-Up Table Used in Modern FPGA","publication_year":2022,"publication_date":"2022-10-07","ids":{"openalex":"https://openalex.org/W4303449325","doi":"https://doi.org/10.1142/s021812662350113x"},"language":"en","primary_location":{"id":"doi:10.1142/s021812662350113x","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s021812662350113x","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040051225","display_name":"Vivek Kumar Singh","orcid":"https://orcid.org/0000-0003-4614-7633"},"institutions":[{"id":"https://openalex.org/I196486160","display_name":"National Institute of Technology Agartala","ror":"https://ror.org/03swyrn62","country_code":"IN","type":"education","lineage":["https://openalex.org/I196486160"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Vivek Kumar Singh","raw_affiliation_strings":["Department of ECE, National Institute of Technology, Agartala, Agartala, Tripura 799046, India"],"affiliations":[{"raw_affiliation_string":"Department of ECE, National Institute of Technology, Agartala, Agartala, Tripura 799046, India","institution_ids":["https://openalex.org/I196486160"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057973516","display_name":"Abhishek Nag","orcid":"https://orcid.org/0000-0002-1836-1547"},"institutions":[{"id":"https://openalex.org/I196486160","display_name":"National Institute of Technology Agartala","ror":"https://ror.org/03swyrn62","country_code":"IN","type":"education","lineage":["https://openalex.org/I196486160"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Abhishek Nag","raw_affiliation_strings":["Department of ECE, National Institute of Technology, Agartala, Agartala, Tripura 799046, India"],"affiliations":[{"raw_affiliation_string":"Department of ECE, National Institute of Technology, Agartala, Agartala, Tripura 799046, India","institution_ids":["https://openalex.org/I196486160"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103003705","display_name":"Abhishek Bhattacharjee","orcid":"https://orcid.org/0000-0002-9664-1050"},"institutions":[{"id":"https://openalex.org/I196486160","display_name":"National Institute of Technology Agartala","ror":"https://ror.org/03swyrn62","country_code":"IN","type":"education","lineage":["https://openalex.org/I196486160"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Abhishek Bhattacharjee","raw_affiliation_strings":["Department of ECE, National Institute of Technology, Agartala, Agartala, Tripura 799046, India"],"affiliations":[{"raw_affiliation_string":"Department of ECE, National Institute of Technology, Agartala, Agartala, Tripura 799046, India","institution_ids":["https://openalex.org/I196486160"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046717391","display_name":"Sambhu Nath Pradhan","orcid":"https://orcid.org/0000-0002-5461-6535"},"institutions":[{"id":"https://openalex.org/I196486160","display_name":"National Institute of Technology Agartala","ror":"https://ror.org/03swyrn62","country_code":"IN","type":"education","lineage":["https://openalex.org/I196486160"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sambhu Nath Pradhan","raw_affiliation_strings":["Department of ECE, National Institute of Technology, Agartala, Agartala, Tripura 799046, India"],"affiliations":[{"raw_affiliation_string":"Department of ECE, National Institute of Technology, Agartala, Agartala, Tripura 799046, India","institution_ids":["https://openalex.org/I196486160"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5040051225"],"corresponding_institution_ids":["https://openalex.org/I196486160"],"apc_list":null,"apc_paid":null,"fwci":0.2744,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.53186062,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"32","issue":"07","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.7978564500808716},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7146509885787964},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.6757572889328003},{"id":"https://openalex.org/keywords/header","display_name":"Header","score":0.611055850982666},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5186887979507446},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5176187753677368},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.494191437959671},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4708024263381958},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45586562156677246},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.43698781728744507},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4129122495651245},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3661717474460602},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3654215335845947},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3090469539165497},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.266595721244812},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09207987785339355}],"concepts":[{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.7978564500808716},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7146509885787964},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.6757572889328003},{"id":"https://openalex.org/C48105269","wikidata":"https://www.wikidata.org/wiki/Q1141160","display_name":"Header","level":2,"score":0.611055850982666},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5186887979507446},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5176187753677368},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.494191437959671},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4708024263381958},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45586562156677246},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.43698781728744507},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4129122495651245},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3661717474460602},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3654215335845947},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3090469539165497},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.266595721244812},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09207987785339355},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s021812662350113x","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s021812662350113x","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.4099999964237213}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1963818365","https://openalex.org/W1970278706","https://openalex.org/W2006584048","https://openalex.org/W2029663117","https://openalex.org/W2054469062","https://openalex.org/W2056744900","https://openalex.org/W2067500889","https://openalex.org/W2137265220","https://openalex.org/W2138099459","https://openalex.org/W2335041696","https://openalex.org/W2343750816","https://openalex.org/W2530008369","https://openalex.org/W2606420487","https://openalex.org/W2790890920","https://openalex.org/W2909731427","https://openalex.org/W2999500237","https://openalex.org/W3004287508","https://openalex.org/W3006576740","https://openalex.org/W3135390746","https://openalex.org/W4207060104","https://openalex.org/W4226015703"],"related_works":["https://openalex.org/W2972036948","https://openalex.org/W3009963418","https://openalex.org/W2530008369","https://openalex.org/W2152979262","https://openalex.org/W4390197045","https://openalex.org/W2339082925","https://openalex.org/W2053857784","https://openalex.org/W1949070338","https://openalex.org/W576646735","https://openalex.org/W1555799781"],"abstract_inverted_index":{"Due":[0],"to":[1,35,69,153,163],"technological":[2],"advancements":[3],"and":[4,44,62,95,103,112,134,142,199,208,225],"voltage":[5],"scaling,":[6],"leakage":[7,51,72,99],"power":[8,58,73,100,126,139,147],"has":[9,202],"become":[10],"an":[11,36],"important":[12],"concern":[13],"in":[14,81,174],"CMOS":[15],"design.":[16],"The":[17,86,115,131,191,212],"implementation":[18],"of":[19,29,47,74,109,121,127,167,187,205,215],"a":[20,27,203],"field-programmable":[21],"gate":[22],"array":[23],"(FPGA)":[24],"circuit":[25,39,169],"utilizes":[26],"portion":[28],"the":[30,42,48,71,75,82,91,107,123,128,154,165,168,184,188,195,216,222,228],"FPGA\u2019s":[31],"resources":[32],"as":[33],"compared":[34],"application-specific":[37],"integrated":[38],"(ASIC).":[40],"Both":[41],"utilized":[43],"unutilized":[45],"parts":[46],"FPGA":[49],"dissipate":[50],"power.":[52],"In":[53],"this":[54,175],"work,":[55,176],"two":[56],"dynamic":[57],"gating":[59,149],"techniques,":[60],"PSG-1":[61,94,133,198,223],"PSG-2,":[63],"are":[64,67],"proposed,":[65],"which":[66],"able":[68],"reduce":[70,97,137],"6-input":[76,129],"look-up":[77],"table":[78],"(LUT)":[79],"used":[80],"Xilinx":[83],"Spartan-6":[84],"series.":[85],"obtained":[87],"results":[88,192],"show":[89,193],"that":[90,194],"proposed":[92,116],"approaches":[93,136],"PSG-2":[96,135,200,229],"average":[98,124,138],"by":[101,140,182],"54.61%":[102],"66.69%,":[104],"respectively,":[105],"at":[106],"expense":[108],"nominal":[110],"area":[111],"delay":[113],"overhead.":[114],"method":[117],"is":[118,150,170,180,219],"also":[119],"capable":[120],"lowering":[122],"total":[125],"LUT.":[130],"suggested":[132],"53.75%":[141],"60.83%,":[143],"respectively.":[144,211,231],"However,":[145],"header-based":[146],"supply":[148],"extremely":[151],"vulnerable":[152],"negative-bias":[155],"temperature":[156],"instability":[157],"(NBTI)":[158],"aging":[159],"effect":[160],"and,":[161],"due":[162],"this,":[164],"lifetime":[166,177,204],"reduced":[171],"considerably.":[172],"Therefore,":[173],"estimation-based":[178],"analysis":[179],"performed":[181],"varying":[183],"stress":[185,213],"probability":[186],"sleep":[189,217],"transistor.":[190],"LUT":[196],"with":[197],"techniques":[201],"4.55":[206],"years":[207],"11.13":[209],"years,":[210],"time":[214],"transistor":[218],"50%":[220],"for":[221,227],"technique":[224],"25%":[226],"technique,":[230]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}