{"id":"https://openalex.org/W4285590866","doi":"https://doi.org/10.1142/s0218126623500214","title":"Design and Implementation of Face Detection Architecture for Heterogeneous System-on-Chip","display_name":"Design and Implementation of Face Detection Architecture for Heterogeneous System-on-Chip","publication_year":2022,"publication_date":"2022-07-16","ids":{"openalex":"https://openalex.org/W4285590866","doi":"https://doi.org/10.1142/s0218126623500214"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126623500214","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126623500214","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014290377","display_name":"Nidhi Panda","orcid":"https://orcid.org/0000-0002-6962-1177"},"institutions":[{"id":"https://openalex.org/I16292982","display_name":"National Institute of Technology Rourkela","ror":"https://ror.org/011gmn932","country_code":"IN","type":"education","lineage":["https://openalex.org/I16292982"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Nidhi Panda","raw_affiliation_strings":["Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela 769008, Odisha, India"],"raw_orcid":"https://orcid.org/0000-0002-6962-1177","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela 769008, Odisha, India","institution_ids":["https://openalex.org/I16292982"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100673145","display_name":"Supratim Gupta","orcid":"https://orcid.org/0000-0001-5226-8701"},"institutions":[{"id":"https://openalex.org/I16292982","display_name":"National Institute of Technology Rourkela","ror":"https://ror.org/011gmn932","country_code":"IN","type":"education","lineage":["https://openalex.org/I16292982"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Supratim Gupta","raw_affiliation_strings":["Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela 769008, Odisha, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela 769008, Odisha, India","institution_ids":["https://openalex.org/I16292982"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5014290377"],"corresponding_institution_ids":["https://openalex.org/I16292982"],"apc_list":null,"apc_paid":null,"fwci":0.0883,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.37448619,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"32","issue":"02","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10057","display_name":"Face and Expression Recognition","score":0.9886999726295471,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7750707268714905},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6611740589141846},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5490555763244629},{"id":"https://openalex.org/keywords/face-detection","display_name":"Face detection","score":0.5172939300537109},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.4942324459552765},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4796591103076935},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.47252824902534485},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.46958866715431213},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"Hardware architecture","score":0.4657730758190155},{"id":"https://openalex.org/keywords/classifier","display_name":"Classifier (UML)","score":0.451510488986969},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.43008890748023987},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3751404881477356},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37232422828674316},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36452415585517883},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.325628399848938},{"id":"https://openalex.org/keywords/facial-recognition-system","display_name":"Facial recognition system","score":0.3099100589752197},{"id":"https://openalex.org/keywords/feature-extraction","display_name":"Feature extraction","score":0.23111054301261902},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.19602692127227783}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7750707268714905},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6611740589141846},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5490555763244629},{"id":"https://openalex.org/C4641261","wikidata":"https://www.wikidata.org/wiki/Q11681085","display_name":"Face detection","level":4,"score":0.5172939300537109},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.4942324459552765},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4796591103076935},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.47252824902534485},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.46958866715431213},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.4657730758190155},{"id":"https://openalex.org/C95623464","wikidata":"https://www.wikidata.org/wiki/Q1096149","display_name":"Classifier (UML)","level":2,"score":0.451510488986969},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.43008890748023987},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3751404881477356},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37232422828674316},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36452415585517883},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.325628399848938},{"id":"https://openalex.org/C31510193","wikidata":"https://www.wikidata.org/wiki/Q1192553","display_name":"Facial recognition system","level":3,"score":0.3099100589752197},{"id":"https://openalex.org/C52622490","wikidata":"https://www.wikidata.org/wiki/Q1026626","display_name":"Feature extraction","level":2,"score":0.23111054301261902},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19602692127227783},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126623500214","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126623500214","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2023203414","https://openalex.org/W2121601095","https://openalex.org/W2121846372","https://openalex.org/W2123472193","https://openalex.org/W2133941955","https://openalex.org/W2159925574","https://openalex.org/W2160532515","https://openalex.org/W2276486856","https://openalex.org/W2490552530","https://openalex.org/W2585080403","https://openalex.org/W2599022646","https://openalex.org/W2741634092","https://openalex.org/W2986445670","https://openalex.org/W2988916019","https://openalex.org/W3022605306","https://openalex.org/W3023406973"],"related_works":["https://openalex.org/W55440466","https://openalex.org/W2374428661","https://openalex.org/W2390965452","https://openalex.org/W2095366957","https://openalex.org/W2393801835","https://openalex.org/W2359105433","https://openalex.org/W2375326151","https://openalex.org/W2093215079","https://openalex.org/W2541819923","https://openalex.org/W2103962833"],"abstract_inverted_index":{"The":[0,137,146],"seminal":[1],"work":[2],"of":[3,43,62,75,122,153,163,179,204],"Viola":[4],"and":[5,18,40,59,89,107,125,160,169,200],"Jones":[6],"for":[7,79,176,209],"automatic":[8],"face":[9,26,77,210],"detection":[10,27],"is":[11],"widely":[12],"used":[13],"in":[14,37,66,149],"many":[15],"human\u2013computer":[16],"interaction":[17],"computer":[19],"vision":[20],"applications.":[21],"On":[22],"analyzing":[23],"the":[24,52,57,63,83,96,104,114,186,202],"existing":[25],"architectures,":[28],"we":[29,69],"observed":[30],"that":[31,185],"integral":[32,86],"image":[33,44,87,105,178],"calculation,":[34],"feature":[35],"computation":[36,88],"cascaded":[38,90],"classifier,":[39],"recursive":[41],"scanning":[42],"with":[45,158],"sliding":[46],"window":[47],"at":[48],"multiple":[49],"scales":[50],"are":[51,93,111,128],"major":[53],"reasons":[54],"which":[55,198],"increase":[56],"memory":[58],"time":[60],"complexity":[61],"algorithm.":[64],"Therefore,":[65],"this":[67],"paper,":[68],"have":[70],"proposed":[71,84,138,187],"a":[72,150],"hardware\u2013software":[73],"co-design":[74],"Viola\u2013Jones":[76],"detector":[78],"System-on-Chip":[80],"(SoC).":[81],"In":[82],"architecture,":[85],"classifier":[91],"sub-modules":[92,110],"implemented":[94,112],"on":[95,113,143],"hardware":[97],"\u2014":[98,116],"Programmable":[99],"Logic":[100],"FPGA":[101],"(PL-FPGA),":[102],"while":[103],"scaling":[106],"nonmaximum":[108],"suppression":[109],"software":[115],"Processing":[117],"System":[118],"ARM":[119],"(PS-ARM).":[120],"Concepts":[121],"pipelining,":[123],"folding,":[124],"parallel":[126],"processing":[127,151],"effectively":[129],"utilized":[130],"to":[131,195],"produce":[132],"an":[133,177],"optimum":[134],"design":[135],"architecture.":[136],"architecture":[139,188],"has":[140,189],"been":[141],"tested":[142],"PYNQ-Z1":[144],"board.":[145],"implementation":[147],"results":[148],"speed":[152],"[Formula:":[154,164,170],"see":[155,165,167,171,173],"text]":[156],"fps":[157],"PL":[159],"PS":[161],"clocks":[162],"text][Formula:":[166,172],"text]MHz":[168],"text]MHz,":[174],"respectively,":[175],"QVGA":[180],"resolution.":[181],"Results":[182],"analysis":[183],"demonstrates":[184],"minimum":[190],"resource":[191],"requirement":[192],"as":[193],"compared":[194],"state-of-the-art":[196],"implementations,":[197],"facilitates":[199],"promotes":[201],"usage":[203],"resource-constrained":[205],"low-cost":[206],"ZYNQ":[207],"SoC":[208],"detection.":[211]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
