{"id":"https://openalex.org/W3188247954","doi":"https://doi.org/10.1142/s0218126622500165","title":"Low Power Transposed Form 4-Tap Finite Impulse Response Filter Using Power Efficient Multiply Accumulate Unit","display_name":"Low Power Transposed Form 4-Tap Finite Impulse Response Filter Using Power Efficient Multiply Accumulate Unit","publication_year":2021,"publication_date":"2021-07-29","ids":{"openalex":"https://openalex.org/W3188247954","doi":"https://doi.org/10.1142/s0218126622500165","mag":"3188247954"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126622500165","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126622500165","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090077776","display_name":"S. Rakesh","orcid":null},"institutions":[{"id":"https://openalex.org/I96797292","display_name":"Noorul Islam University","ror":"https://ror.org/01y2gf490","country_code":"IN","type":"education","lineage":["https://openalex.org/I96797292"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"S. Rakesh","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Noorul Islam Centre for Higher Education, Kumaracoil, Thuckalay, Tamil Nadu 629180, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Noorul Islam Centre for Higher Education, Kumaracoil, Thuckalay, Tamil Nadu 629180, India","institution_ids":["https://openalex.org/I96797292"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112953149","display_name":"K. S. Vijula Grace","orcid":null},"institutions":[{"id":"https://openalex.org/I96797292","display_name":"Noorul Islam University","ror":"https://ror.org/01y2gf490","country_code":"IN","type":"education","lineage":["https://openalex.org/I96797292"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"K. S. Vijula Grace","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Noorul Islam Centre for Higher Education, Kumaracoil, Thuckalay, Tamil Nadu 629180, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Noorul Islam Centre for Higher Education, Kumaracoil, Thuckalay, Tamil Nadu 629180, India","institution_ids":["https://openalex.org/I96797292"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5090077776"],"corresponding_institution_ids":["https://openalex.org/I96797292"],"apc_list":null,"apc_paid":null,"fwci":0.3047,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.53515889,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"31","issue":"01","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.7623507976531982},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6473890542984009},{"id":"https://openalex.org/keywords/filter-design","display_name":"Filter design","score":0.6095547676086426},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.5726172924041748},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5452888011932373},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.5048192143440247},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.49746158719062805},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.48750659823417664},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.45164912939071655},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4429522752761841},{"id":"https://openalex.org/keywords/linear-phase","display_name":"Linear phase","score":0.43706172704696655},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.4355491101741791},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.43197566270828247},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2135491669178009},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.198992520570755},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12278890609741211},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.10529938340187073}],"concepts":[{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.7623507976531982},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6473890542984009},{"id":"https://openalex.org/C22597639","wikidata":"https://www.wikidata.org/wiki/Q5449227","display_name":"Filter design","level":3,"score":0.6095547676086426},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.5726172924041748},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5452888011932373},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.5048192143440247},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.49746158719062805},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.48750659823417664},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.45164912939071655},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4429522752761841},{"id":"https://openalex.org/C20610874","wikidata":"https://www.wikidata.org/wiki/Q512136","display_name":"Linear phase","level":3,"score":0.43706172704696655},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.4355491101741791},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.43197566270828247},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2135491669178009},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.198992520570755},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12278890609741211},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.10529938340187073},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126622500165","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126622500165","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7699999809265137}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1515334873","https://openalex.org/W2016491712","https://openalex.org/W2076941448","https://openalex.org/W2081801061","https://openalex.org/W2127696501","https://openalex.org/W2168350974","https://openalex.org/W2328099221","https://openalex.org/W2461252613","https://openalex.org/W2521030015","https://openalex.org/W2774426670","https://openalex.org/W2777162717","https://openalex.org/W2779049527","https://openalex.org/W2800715380","https://openalex.org/W2895549242","https://openalex.org/W2907620743","https://openalex.org/W2909705054","https://openalex.org/W2930132309","https://openalex.org/W2947163352","https://openalex.org/W2947915572","https://openalex.org/W2955740306","https://openalex.org/W3021392333","https://openalex.org/W3082309838","https://openalex.org/W3093793829","https://openalex.org/W3117889200","https://openalex.org/W3128809014"],"related_works":["https://openalex.org/W1988025771","https://openalex.org/W4200366934","https://openalex.org/W4366367917","https://openalex.org/W4383746640","https://openalex.org/W3170403192","https://openalex.org/W2592756624","https://openalex.org/W3129942571","https://openalex.org/W2087161756","https://openalex.org/W2930132309","https://openalex.org/W2366051454"],"abstract_inverted_index":{"Finite":[0],"impulse":[1],"response":[2,20],"(FIR)":[3],"filters":[4,26],"find":[5],"wide":[6],"application":[7],"in":[8,29,146],"signal":[9],"processing":[10],"applications":[11],"on":[12],"account":[13],"of":[14,21,48,53,69,75,136,139,144],"the":[15,22,54,67,116,126,147,152],"stability":[16],"and":[17,42,87,103,141],"linear":[18],"phase":[19],"filter.":[23],"These":[24],"digital":[25,40],"are":[27,59,96],"used":[28],"applications,":[30],"like":[31],"biomedical":[32],"engineering,":[33],"wireless":[34],"communication,":[35],"image":[36],"processing,":[37,39],"speech":[38],"audio":[41],"video":[43],"processing.":[44],"Low":[45],"power":[46,72,148],"design":[47,74,132],"FIR":[49,79],"filter":[50,80,112,131],"is":[51,113],"one":[52],"major":[55],"constraints":[56],"that":[57],"researchers":[58],"trying":[60],"hard":[61],"to":[62,151],"achieve.":[63],"This":[64],"paper":[65],"presents":[66],"implementation":[68],"a":[70,76,82,88,137,142],"novel":[71],"efficient":[73],"4-tap":[77],"16-bit":[78],"using":[81,98,105],"modified":[83,89],"Vedic":[84],"multiplier":[85],"(MVM)":[86],"Han":[90],"Carlson":[91],"adder":[92],"(MHCA).":[93],"The":[94,111,129],"units":[95],"coded":[97],"Verilog":[99],"hardware":[100],"description":[101],"language":[102],"simulated":[104],"Xilinx":[106],"Vivado":[107],"Design":[108],"Suite":[109],"2015.2.":[110],"synthesized":[114],"for":[115],"7-series":[117],"Artix":[118],"field":[119],"programmable":[120],"gate":[121],"array":[122],"with":[123],"xc7a100tcsg324-1":[124],"as":[125],"target":[127],"device.":[128],"proposed":[130],"showed":[133],"an":[134],"improvement":[135],"maximum":[138],"57.44%":[140],"minimum":[143],"2.44%":[145],"consumption":[149],"compared":[150],"existing":[153],"models.":[154]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
