{"id":"https://openalex.org/W3082840770","doi":"https://doi.org/10.1142/s0218126621500651","title":"An Application Specific Reconfigurable Architecture with Reduced Area and Static Memory Cells","display_name":"An Application Specific Reconfigurable Architecture with Reduced Area and Static Memory Cells","publication_year":2020,"publication_date":"2020-09-02","ids":{"openalex":"https://openalex.org/W3082840770","doi":"https://doi.org/10.1142/s0218126621500651","mag":"3082840770"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126621500651","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126621500651","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002664579","display_name":"Muhammad Mazher Iqbal","orcid":"https://orcid.org/0000-0002-2421-8456"},"institutions":[{"id":"https://openalex.org/I103583917","display_name":"Karachi Institute of Economics and Technology","ror":"https://ror.org/02sdmkj94","country_code":"PK","type":"education","lineage":["https://openalex.org/I103583917"]}],"countries":["PK"],"is_corresponding":false,"raw_author_name":"Muhammad Mazher Iqbal","raw_affiliation_strings":["Karachi Institute of Economics and Technology, Korangi Creek, Karachi-75190, Pakistan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Karachi Institute of Economics and Technology, Korangi Creek, Karachi-75190, Pakistan","institution_ids":["https://openalex.org/I103583917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079308988","display_name":"Husain Parvez","orcid":"https://orcid.org/0000-0002-6544-2454"},"institutions":[{"id":"https://openalex.org/I103583917","display_name":"Karachi Institute of Economics and Technology","ror":"https://ror.org/02sdmkj94","country_code":"PK","type":"education","lineage":["https://openalex.org/I103583917"]}],"countries":["PK"],"is_corresponding":true,"raw_author_name":"Husain Parvez","raw_affiliation_strings":["Karachi Institute of Economics and Technology, Korangi Creek, Karachi-75190, Pakistan"],"raw_orcid":"https://orcid.org/0000-0002-6544-2454","affiliations":[{"raw_affiliation_string":"Karachi Institute of Economics and Technology, Korangi Creek, Karachi-75190, Pakistan","institution_ids":["https://openalex.org/I103583917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005540369","display_name":"Fasahat Hussain","orcid":"https://orcid.org/0000-0001-5874-297X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Fasahat Hussain","raw_affiliation_strings":["Digitek Engineering, Karachi, Pakistan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Digitek Engineering, Karachi, Pakistan","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077892555","display_name":"Muhammad Rashid","orcid":"https://orcid.org/0000-0001-5852-1296"},"institutions":[{"id":"https://openalex.org/I199693650","display_name":"Umm al-Qura University","ror":"https://ror.org/01xjqrm90","country_code":"SA","type":"education","lineage":["https://openalex.org/I199693650"]}],"countries":["SA"],"is_corresponding":false,"raw_author_name":"Muhammad Rashid","raw_affiliation_strings":["College of Computer and Information Systems, Computer Engineering Department, Umm Al Qura University, Makkah, Saudi Arabia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Computer and Information Systems, Computer Engineering Department, Umm Al Qura University, Makkah, Saudi Arabia","institution_ids":["https://openalex.org/I199693650"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5079308988"],"corresponding_institution_ids":["https://openalex.org/I103583917"],"apc_list":null,"apc_paid":null,"fwci":0.2081,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.51702464,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"30","issue":"04","first_page":"2150065","last_page":"2150065"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.8823068141937256},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7549599409103394},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7396737337112427},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7342253923416138},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7293580770492554},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.5923566818237305},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5349971055984497},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5227349400520325},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5037481188774109},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4932822585105896},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.4364679455757141},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3959210515022278},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38782164454460144},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1258588433265686},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09424158930778503}],"concepts":[{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.8823068141937256},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7549599409103394},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7396737337112427},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7342253923416138},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7293580770492554},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.5923566818237305},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5349971055984497},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5227349400520325},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5037481188774109},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4932822585105896},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.4364679455757141},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3959210515022278},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38782164454460144},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1258588433265686},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09424158930778503},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126621500651","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126621500651","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1757537413","https://openalex.org/W2024238509","https://openalex.org/W2025907248","https://openalex.org/W2047821585","https://openalex.org/W2052990662","https://openalex.org/W2057142053","https://openalex.org/W2113645429","https://openalex.org/W2141823036","https://openalex.org/W2168493238","https://openalex.org/W2171888576","https://openalex.org/W2362146931","https://openalex.org/W2487018225","https://openalex.org/W2584574128","https://openalex.org/W2592502324","https://openalex.org/W2626308854","https://openalex.org/W2740862688","https://openalex.org/W2788726558","https://openalex.org/W2789564496","https://openalex.org/W2907761035","https://openalex.org/W2914092297","https://openalex.org/W3033033241","https://openalex.org/W3039644518","https://openalex.org/W4206262605","https://openalex.org/W4232559376"],"related_works":["https://openalex.org/W2152623100","https://openalex.org/W2096417281","https://openalex.org/W25204318","https://openalex.org/W2138895528","https://openalex.org/W2077035242","https://openalex.org/W3042643149","https://openalex.org/W2026481470","https://openalex.org/W1999203047","https://openalex.org/W3201977823","https://openalex.org/W2362203107"],"abstract_inverted_index":{"An":[0],"Application":[1],"Specific":[2],"Inflexible":[3],"FPGA":[4,44,48,201],"(ASIF)":[5],"is":[6,18,50,67,192,224,234],"a":[7,11,62,88,94,203,257,273],"tailored":[8],"design,":[9],"for":[10,57,211,256],"given":[12],"group":[13,258],"of":[14,26,65,79,102,108,120,136,177,185,190,246,259],"known":[15,58,212],"circuits,":[16,213],"which":[17],"generated":[19],"by":[20,70,141],"extensively":[21],"reducing":[22,111],"the":[23,47,76,99,106,117,124,133,143,161,169,175,183,207,252],"routing":[24,134],"resources":[25],"an":[27,30,43,54,103,121,199,219,230],"FPGA.":[28,90,275],"In":[29],"ASIF,":[31],"different":[32],"dynamically":[33],"reconfigurable":[34],"application":[35,59],"circuits":[36],"are":[37,138],"initially":[38],"mapped":[39],"and":[40,81,154,164,174,239],"tested":[41],"on":[42],"fabric.":[45],"Subsequently,":[46],"fabric":[49],"reduced":[51,217],"to":[52,96,181,218,251,272],"achieve":[53],"efficient":[55],"architecture":[56],"circuits.":[60,186,261],"However,":[61],"large":[63],"portion":[64],"ASIF":[66,104,122,137,191,255],"still":[68],"occupied":[69],"fully":[71],"flexible":[72],"logic":[73,100,118],"blocks,":[74],"containing":[75],"same":[77],"amount":[78],"area":[80,268],"SRAM":[82,247],"memory":[83,179],"cells,":[84,248],"as":[85,194,249,270],"found":[86,225],"in":[87,202],"traditional":[89,274],"Thus,":[91],"here":[92],"lies":[93],"potential":[95],"further":[97,139],"optimize":[98],"blocks":[101,119],"at":[105],"expense":[107],"removing":[109],"or":[110],"their":[112,130],"reconfigurability.":[113,131],"This":[114,187],"work":[115],"optimizes":[116],"through":[123,226],"SRAM-Table":[125],"sharing":[126,153],"technique,":[127],"without":[128],"compromising":[129],"Moreover,":[132],"channels":[135],"optimized":[140,188],"applying":[142],"Boolean":[144,155],"functions":[145,156],"(Gates)":[146],"insertion":[147],"technique.":[148],"The":[149],"applied":[150],"techniques":[151],"(SRAM-Table":[152],"insertion)":[157],"not":[158],"only":[159],"reduce":[160],"area,":[162],"delay":[163],"power,":[165],"but":[166],"also":[167,263],"minimize":[168],"reconfiguration":[170,210],"time,":[171],"bitstream":[172,184],"size":[173,176],"external":[178],"required":[180],"store":[182],"version":[189],"termed":[193],"ASIF[Formula:":[195,220,231],"see":[196,221,232,236,242,266],"text].":[197,222],"Furthermore,":[198],"embedded":[200],"System-on-Chip":[204],"that":[205,229],"requires":[206,240],"partial":[208],"dynamic":[209],"can":[214],"be":[215],"automatically":[216],"It":[223,262],"experimental":[227],"results":[228],"text]":[233,237,243,267],"4\u20139[Formula:":[235],"area-efficient":[238],"[Formula:":[241],"lesser":[244],"number":[245],"compared":[250,271],"previously":[253],"proposed":[254],"2\u20135":[260],"achieves":[264],"34\u201353[Formula:":[265],"saving":[269]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
