{"id":"https://openalex.org/W2969272218","doi":"https://doi.org/10.1142/s0218126620501133","title":"A VGA Linearity Improvement Technique for ECG Analog Front-End in 65nm CMOS","display_name":"A VGA Linearity Improvement Technique for ECG Analog Front-End in 65nm CMOS","publication_year":2019,"publication_date":"2019-08-21","ids":{"openalex":"https://openalex.org/W2969272218","doi":"https://doi.org/10.1142/s0218126620501133","mag":"2969272218"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126620501133","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126620501133","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://radar.brookes.ac.uk/radar/items/439396d6-3c6e-4a62-9cee-9b5d6b23c6e4/1/","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089334609","display_name":"R. Nagulapalli","orcid":"https://orcid.org/0000-0003-0526-3232"},"institutions":[{"id":"https://openalex.org/I124261462","display_name":"Oxford Brookes University","ror":"https://ror.org/04v2twj65","country_code":"GB","type":"education","lineage":["https://openalex.org/I124261462"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Rajasekhar Nagulapalli","raw_affiliation_strings":["School of Engineering, Computing and Mathematics, Oxford Brookes University, Wheatley Campus, Wheatley, Oxford, OX33 1HX, UK"],"affiliations":[{"raw_affiliation_string":"School of Engineering, Computing and Mathematics, Oxford Brookes University, Wheatley Campus, Wheatley, Oxford, OX33 1HX, UK","institution_ids":["https://openalex.org/I124261462"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032345863","display_name":"K. Hayatleh","orcid":"https://orcid.org/0000-0003-0149-1772"},"institutions":[{"id":"https://openalex.org/I124261462","display_name":"Oxford Brookes University","ror":"https://ror.org/04v2twj65","country_code":"GB","type":"education","lineage":["https://openalex.org/I124261462"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Khaled Hayatleh","raw_affiliation_strings":["School of Engineering, Computing and Mathematics, Oxford Brookes University, Wheatley Campus, Wheatley, Oxford, OX33 1HX, UK"],"affiliations":[{"raw_affiliation_string":"School of Engineering, Computing and Mathematics, Oxford Brookes University, Wheatley Campus, Wheatley, Oxford, OX33 1HX, UK","institution_ids":["https://openalex.org/I124261462"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103811258","display_name":"Steve Barker","orcid":null},"institutions":[{"id":"https://openalex.org/I124261462","display_name":"Oxford Brookes University","ror":"https://ror.org/04v2twj65","country_code":"GB","type":"education","lineage":["https://openalex.org/I124261462"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Steve Barker","raw_affiliation_strings":["School of Engineering, Computing and Mathematics, Oxford Brookes University, Wheatley Campus, Wheatley, Oxford, OX33 1HX, UK"],"affiliations":[{"raw_affiliation_string":"School of Engineering, Computing and Mathematics, Oxford Brookes University, Wheatley Campus, Wheatley, Oxford, OX33 1HX, UK","institution_ids":["https://openalex.org/I124261462"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5089334609"],"corresponding_institution_ids":["https://openalex.org/I124261462"],"apc_list":null,"apc_paid":null,"fwci":0.1993,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.51149448,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":"29","issue":"07","first_page":"2050113","last_page":"2050113"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/video-graphics-array","display_name":"Video Graphics Array","score":0.8653514385223389},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.7739659547805786},{"id":"https://openalex.org/keywords/variable-gain-amplifier","display_name":"Variable-gain amplifier","score":0.7487683892250061},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7037680149078369},{"id":"https://openalex.org/keywords/total-harmonic-distortion","display_name":"Total harmonic distortion","score":0.6374698877334595},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.5337074398994446},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.4914592504501343},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4770968556404114},{"id":"https://openalex.org/keywords/loop-gain","display_name":"Loop gain","score":0.46215561032295227},{"id":"https://openalex.org/keywords/analog-front-end","display_name":"Analog front-end","score":0.44555404782295227},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.44420143961906433},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.43044519424438477},{"id":"https://openalex.org/keywords/feedback-loop","display_name":"Feedback loop","score":0.42519426345825195},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41502201557159424},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2337072491645813},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.17635485529899597}],"concepts":[{"id":"https://openalex.org/C139983466","wikidata":"https://www.wikidata.org/wiki/Q17194","display_name":"Video Graphics Array","level":3,"score":0.8653514385223389},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.7739659547805786},{"id":"https://openalex.org/C91541141","wikidata":"https://www.wikidata.org/wiki/Q1894933","display_name":"Variable-gain amplifier","level":5,"score":0.7487683892250061},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7037680149078369},{"id":"https://openalex.org/C42156128","wikidata":"https://www.wikidata.org/wiki/Q162641","display_name":"Total harmonic distortion","level":3,"score":0.6374698877334595},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.5337074398994446},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.4914592504501343},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4770968556404114},{"id":"https://openalex.org/C199943209","wikidata":"https://www.wikidata.org/wiki/Q1271153","display_name":"Loop gain","level":3,"score":0.46215561032295227},{"id":"https://openalex.org/C2778870119","wikidata":"https://www.wikidata.org/wiki/Q16002927","display_name":"Analog front-end","level":3,"score":0.44555404782295227},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.44420143961906433},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.43044519424438477},{"id":"https://openalex.org/C186886427","wikidata":"https://www.wikidata.org/wiki/Q5441213","display_name":"Feedback loop","level":2,"score":0.42519426345825195},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41502201557159424},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2337072491645813},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.17635485529899597},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1142/s0218126620501133","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126620501133","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},{"id":"pmh:tle:439396d6-3c6e-4a62-9cee-9b5d6b23c6e4:afee126f-04b2-41a9-a6dd-b29b7c6c20ab:1","is_oa":true,"landing_page_url":"https://radar.brookes.ac.uk/radar/items/439396d6-3c6e-4a62-9cee-9b5d6b23c6e4/1/","pdf_url":null,"source":{"id":"https://openalex.org/S4306400541","display_name":"Radar (Oxford Brookes University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I124261462","host_organization_name":"Oxford Brookes University","host_organization_lineage":["https://openalex.org/I124261462"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"A VGA Linearity improvement technique for ECG analog front-end in 65nm CMOS","raw_type":"journal article"},{"id":"pmh:tle:4d1cd81e-2224-4eec-b62f-4c18eb12274b:b4ef9587-4603-18f8-a471-bb20511f0ad9:1","is_oa":false,"landing_page_url":"https://radar.brookes.ac.uk/radar/items/4d1cd81e-2224-4eec-b62f-4c18eb12274b/1","pdf_url":null,"source":{"id":"https://openalex.org/S4306400541","display_name":"Radar (Oxford Brookes University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I124261462","host_organization_name":"Oxford Brookes University","host_organization_lineage":["https://openalex.org/I124261462"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Journal of Circuits, Systems, and Computers","raw_type":"Journal Article/Review"}],"best_oa_location":{"id":"pmh:tle:439396d6-3c6e-4a62-9cee-9b5d6b23c6e4:afee126f-04b2-41a9-a6dd-b29b7c6c20ab:1","is_oa":true,"landing_page_url":"https://radar.brookes.ac.uk/radar/items/439396d6-3c6e-4a62-9cee-9b5d6b23c6e4/1/","pdf_url":null,"source":{"id":"https://openalex.org/S4306400541","display_name":"Radar (Oxford Brookes University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I124261462","host_organization_name":"Oxford Brookes University","host_organization_lineage":["https://openalex.org/I124261462"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"A VGA Linearity improvement technique for ECG analog front-end in 65nm CMOS","raw_type":"journal article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W81748754","https://openalex.org/W1972150182","https://openalex.org/W2012856983","https://openalex.org/W2061752509","https://openalex.org/W2061922444","https://openalex.org/W2152776190","https://openalex.org/W2159318368","https://openalex.org/W2543480058","https://openalex.org/W2577762902","https://openalex.org/W2765980604","https://openalex.org/W2768152238","https://openalex.org/W2769669497","https://openalex.org/W2773706209","https://openalex.org/W2791866549","https://openalex.org/W2899416171"],"related_works":["https://openalex.org/W2367353976","https://openalex.org/W3175678742","https://openalex.org/W2040400730","https://openalex.org/W1970142521","https://openalex.org/W4382541890","https://openalex.org/W2376891207","https://openalex.org/W2472545333","https://openalex.org/W2640727995","https://openalex.org/W2996678583","https://openalex.org/W2110036404"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,35,44,107,146],"65[Formula:":[4],"see":[5,27,109,118,132,134,143,148],"text]nm":[6],"CMOS":[7],"low-power,":[8],"highly":[9],"linear":[10],"variable":[11],"gain":[12],"amplifier":[13],"(VGA)":[14],"suitable":[15],"for":[16,116],"biomedical":[17],"applications.":[18],"Typical":[19],"biological":[20],"signal":[21,122],"amplitudes":[22],"are":[23],"in":[24,112],"the":[25,58,68,73,80,113,125],"0.5\u2013100[Formula:":[26],"text]mV":[28,119],"range,":[29],"and":[30,103,139],"therefore":[31],"require":[32],"circuits":[33],"with":[34,85],"wide":[36],"dynamic":[37],"range.":[38],"Existing":[39],"VGA":[40],"architectures":[41],"mostly":[42],"exhibit":[43],"poor":[45],"linearity,":[46],"due":[47],"to":[48,56,67,98,124],"very":[49],"low":[50],"local":[51],"feedback":[52,66],"loop-gain.":[53],"A":[54,88],"technique":[55,82],"increase":[57],"loop-gain":[59],"has":[60,95],"been":[61,96],"explored":[62],"by":[63],"adding":[64],"additional":[65],"tail":[69],"current":[70],"source":[71],"of":[72,79,90],"input":[74,121],"differential":[75],"pair.":[76],"Stability":[77],"analysis":[78],"proposed":[81],"was":[83],"undertaken":[84],"pole-zero":[86],"analysis.":[87],"prototype":[89],"Analog":[91],"Front":[92],"End":[93],"(AFE)":[94],"designed":[97],"provide":[99],"25\u201350":[100],"dB":[101],"gain,":[102],"post-layout":[104],"simulations":[105],"showed":[106],"15[Formula:":[108],"text]dB":[110],"reduction":[111],"harmonic":[114],"distortion":[115],"20[Formula:":[117],"pk-pk":[120],"compared":[123],"conventional":[126],"architecture.":[127],"The":[128],"circuit":[129],"occupies":[130],"3,108[Formula:":[131],"text][Formula:":[133],"text]m":[135],"2":[136],"silicon":[137],"area":[138],"consumes":[140],"0.43":[141],"[Formula:":[142],"text]A":[144],"from":[145],"1.2[Formula:":[147],"text]V":[149],"power":[150],"supply.":[151]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
