{"id":"https://openalex.org/W2892303986","doi":"https://doi.org/10.1142/s0218126619501433","title":"Realization of Resistorless and Electronically Tunable Inverse Filters Using VDTA","display_name":"Realization of Resistorless and Electronically Tunable Inverse Filters Using VDTA","publication_year":2018,"publication_date":"2018-09-07","ids":{"openalex":"https://openalex.org/W2892303986","doi":"https://doi.org/10.1142/s0218126619501433","mag":"2892303986"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126619501433","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126619501433","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053938428","display_name":"Praveen Kumar","orcid":"https://orcid.org/0000-0001-5456-9671"},"institutions":[{"id":"https://openalex.org/I189109744","display_name":"Indian Institute of Technology Dhanbad","ror":"https://ror.org/013v3cc28","country_code":"IN","type":"education","lineage":["https://openalex.org/I189109744"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Praveen Kumar","raw_affiliation_strings":["Department of Electronics Engineering, Indian Institute of Technology, Dhanbad, Dhanbad 826004, Jharkhand, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, Indian Institute of Technology, Dhanbad, Dhanbad 826004, Jharkhand, India","institution_ids":["https://openalex.org/I189109744"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022476734","display_name":"Neeta Pandey","orcid":"https://orcid.org/0000-0003-2911-7061"},"institutions":[{"id":"https://openalex.org/I863896202","display_name":"Delhi Technological University","ror":"https://ror.org/01ztcvt22","country_code":"IN","type":"education","lineage":["https://openalex.org/I863896202"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Neeta Pandey","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Delhi Technological University, Delhi 110042, Delhi, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Delhi Technological University, Delhi 110042, Delhi, India","institution_ids":["https://openalex.org/I863896202"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009381925","display_name":"Sajal K. Paul","orcid":"https://orcid.org/0000-0001-5674-4656"},"institutions":[{"id":"https://openalex.org/I189109744","display_name":"Indian Institute of Technology Dhanbad","ror":"https://ror.org/013v3cc28","country_code":"IN","type":"education","lineage":["https://openalex.org/I189109744"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sajal K. Paul","raw_affiliation_strings":["Department of Electronics Engineering, Indian Institute of Technology, Dhanbad, Dhanbad 826004, Jharkhand, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, Indian Institute of Technology, Dhanbad, Dhanbad 826004, Jharkhand, India","institution_ids":["https://openalex.org/I189109744"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5022476734"],"corresponding_institution_ids":["https://openalex.org/I863896202"],"apc_list":null,"apc_paid":null,"fwci":1.1985,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.77639462,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"28","issue":"09","first_page":"1950143","last_page":"1950143"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inverse","display_name":"Inverse","score":0.7696447372436523},{"id":"https://openalex.org/keywords/realization","display_name":"Realization (probability)","score":0.6066746115684509},{"id":"https://openalex.org/keywords/inverse-filter","display_name":"Inverse filter","score":0.5811907052993774},{"id":"https://openalex.org/keywords/band-pass-filter","display_name":"Band-pass filter","score":0.5797122716903687},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5769586563110352},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5289133787155151},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.5232314467430115},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"Low-pass filter","score":0.4993596076965332},{"id":"https://openalex.org/keywords/active-filter","display_name":"Active filter","score":0.43985262513160706},{"id":"https://openalex.org/keywords/all-pass-filter","display_name":"All-pass filter","score":0.4372306764125824},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4330252408981323},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4154951274394989},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.37954458594322205},{"id":"https://openalex.org/keywords/high-pass-filter","display_name":"High-pass filter","score":0.35594695806503296},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.252410888671875},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1920562982559204},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.18706059455871582}],"concepts":[{"id":"https://openalex.org/C207467116","wikidata":"https://www.wikidata.org/wiki/Q4385666","display_name":"Inverse","level":2,"score":0.7696447372436523},{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.6066746115684509},{"id":"https://openalex.org/C2779948431","wikidata":"https://www.wikidata.org/wiki/Q17092649","display_name":"Inverse filter","level":3,"score":0.5811907052993774},{"id":"https://openalex.org/C147788027","wikidata":"https://www.wikidata.org/wiki/Q2718101","display_name":"Band-pass filter","level":2,"score":0.5797122716903687},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5769586563110352},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5289133787155151},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.5232314467430115},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.4993596076965332},{"id":"https://openalex.org/C85899133","wikidata":"https://www.wikidata.org/wiki/Q557211","display_name":"Active filter","level":3,"score":0.43985262513160706},{"id":"https://openalex.org/C47427576","wikidata":"https://www.wikidata.org/wiki/Q1431902","display_name":"All-pass filter","level":5,"score":0.4372306764125824},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4330252408981323},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4154951274394989},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.37954458594322205},{"id":"https://openalex.org/C156137958","wikidata":"https://www.wikidata.org/wiki/Q262754","display_name":"High-pass filter","level":4,"score":0.35594695806503296},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.252410888671875},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1920562982559204},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.18706059455871582},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126619501433","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126619501433","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6299999952316284}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1964013016","https://openalex.org/W1977054694","https://openalex.org/W1986215584","https://openalex.org/W2020885540","https://openalex.org/W2029912438","https://openalex.org/W2039037309","https://openalex.org/W2056194543","https://openalex.org/W2057957484","https://openalex.org/W2062819674","https://openalex.org/W2064064073","https://openalex.org/W2083038088","https://openalex.org/W2089752644","https://openalex.org/W2124737155","https://openalex.org/W2155750078","https://openalex.org/W2160105535","https://openalex.org/W2226341133","https://openalex.org/W2314607811","https://openalex.org/W2467491100","https://openalex.org/W2470059576","https://openalex.org/W4243513962"],"related_works":["https://openalex.org/W1966728429","https://openalex.org/W1697242026","https://openalex.org/W2808035885","https://openalex.org/W2135941737","https://openalex.org/W2783964349","https://openalex.org/W2323335032","https://openalex.org/W2544571831","https://openalex.org/W2150714587","https://openalex.org/W1982411667","https://openalex.org/W2057831124"],"abstract_inverted_index":{"This":[0,51],"paper":[1],"presents":[2],"resistorless":[3],"realization":[4],"of":[5,43,55,86,99,121],"inverse":[6,21,31,45,48,57,59,61,64,73,102],"filters":[7,89],"using":[8,110],"voltage":[9],"differencing":[10],"transconductance":[11],"amplifier":[12],"(VDTA).":[13],"First,":[14],"four":[15],"topologies":[16],"are":[17,76],"proposed":[18,44,72,88,101],"which":[19],"provide":[20],"low-pass,":[22,58],"high-pass,":[23,60],"band-pass,":[24,62],"and":[25,47,63,79,126],"band-reject":[26,65],"responses.":[27],"Subsequently,":[28],"a":[29],"unified":[30],"filter":[32,74,103],"is":[33,53,90,107,133],"also":[34,91],"derived":[35],"by":[36,67],"incorporating":[37],"two":[38],"switches":[39],"in":[40,123],"the":[41,87,97,100,124],"combination":[42],"low-pass":[46],"band-pass":[49],"topologies.":[50],"topology":[52],"capable":[54],"providing":[56],"responses":[66],"appropriate":[68],"switch":[69],"settings.":[70],"The":[71,84,119],"structures":[75],"electronically":[77],"tunable":[78],"use":[80],"only":[81],"grounded":[82],"capacitors.":[83],"behavior":[85],"investigated":[92],"for":[93],"nonidealities.":[94],"To":[95],"verify":[96],"functionality":[98],"circuits,":[104],"SPICE":[105],"simulation":[106],"carried":[108],"out":[109],"0.18-[Formula:":[111],"see":[112],"text]m":[113],"CMOS":[114],"technology":[115],"parameters":[116],"from":[117],"TSMC.":[118],"effect":[120],"deviation":[122],"active":[125],"passive":[127],"component":[128],"values":[129],"on":[130],"angular":[131],"frequency":[132],"tested":[134],"through":[135],"Monte":[136],"Carlo":[137],"simulation.":[138]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}