{"id":"https://openalex.org/W2770954656","doi":"https://doi.org/10.1142/s0218126618501335","title":"Low Latency Area-Efficient Distributed Arithmetic Based Multi-Rate Filter Architecture for SDR Receivers","display_name":"Low Latency Area-Efficient Distributed Arithmetic Based Multi-Rate Filter Architecture for SDR Receivers","publication_year":2017,"publication_date":"2017-11-29","ids":{"openalex":"https://openalex.org/W2770954656","doi":"https://doi.org/10.1142/s0218126618501335","mag":"2770954656"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126618501335","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126618501335","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101860540","display_name":"Ashok Agarwal","orcid":"https://orcid.org/0000-0002-7653-2308"},"institutions":[{"id":"https://openalex.org/I121750182","display_name":"National Institute of Technology Warangal","ror":"https://ror.org/017ebfz38","country_code":"IN","type":"education","lineage":["https://openalex.org/I121750182"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Ashok Agarwal","raw_affiliation_strings":["Department of Electronics & Communication Engineering, National Institute of Technology, Warangal 506004, India"],"raw_orcid":"https://orcid.org/0000-0002-7653-2308","affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, National Institute of Technology, Warangal 506004, India","institution_ids":["https://openalex.org/I121750182"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084699120","display_name":"Lakshmi Bopanna","orcid":null},"institutions":[{"id":"https://openalex.org/I121750182","display_name":"National Institute of Technology Warangal","ror":"https://ror.org/017ebfz38","country_code":"IN","type":"education","lineage":["https://openalex.org/I121750182"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Lakshmi Bopanna","raw_affiliation_strings":["Department of Electronics & Communication Engineering, National Institute of Technology, Warangal 506004, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, National Institute of Technology, Warangal 506004, India","institution_ids":["https://openalex.org/I121750182"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101860540"],"corresponding_institution_ids":["https://openalex.org/I121750182"],"apc_list":null,"apc_paid":null,"fwci":0.1864,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.48572013,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"27","issue":"08","first_page":"1850133","last_page":"1850133"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.993399977684021,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.6004649996757507},{"id":"https://openalex.org/keywords/software-defined-radio","display_name":"Software-defined radio","score":0.5937477350234985},{"id":"https://openalex.org/keywords/voltage-droop","display_name":"Voltage droop","score":0.5903685092926025},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5901115536689758},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.4511241316795349},{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.43203556537628174},{"id":"https://openalex.org/keywords/decimation","display_name":"Decimation","score":0.4244574308395386},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.4194633364677429},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.41715484857559204},{"id":"https://openalex.org/keywords/cascaded-integrator\u2013comb-filter","display_name":"Cascaded integrator\u2013comb filter","score":0.41480371356010437},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4043590724468231},{"id":"https://openalex.org/keywords/filter-design","display_name":"Filter design","score":0.39497965574264526},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3113757371902466},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23940333724021912},{"id":"https://openalex.org/keywords/prototype-filter","display_name":"Prototype filter","score":0.20719808340072632},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12774112820625305},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12263211607933044},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.11540031433105469},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0987887978553772}],"concepts":[{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.6004649996757507},{"id":"https://openalex.org/C171115542","wikidata":"https://www.wikidata.org/wiki/Q1331892","display_name":"Software-defined radio","level":2,"score":0.5937477350234985},{"id":"https://openalex.org/C40760162","wikidata":"https://www.wikidata.org/wiki/Q10920295","display_name":"Voltage droop","level":4,"score":0.5903685092926025},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5901115536689758},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.4511241316795349},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.43203556537628174},{"id":"https://openalex.org/C173642442","wikidata":"https://www.wikidata.org/wiki/Q1253346","display_name":"Decimation","level":3,"score":0.4244574308395386},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.4194633364677429},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.41715484857559204},{"id":"https://openalex.org/C185455795","wikidata":"https://www.wikidata.org/wiki/Q1046877","display_name":"Cascaded integrator\u2013comb filter","level":5,"score":0.41480371356010437},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4043590724468231},{"id":"https://openalex.org/C22597639","wikidata":"https://www.wikidata.org/wiki/Q5449227","display_name":"Filter design","level":3,"score":0.39497965574264526},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3113757371902466},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23940333724021912},{"id":"https://openalex.org/C175742284","wikidata":"https://www.wikidata.org/wiki/Q1415537","display_name":"Prototype filter","level":4,"score":0.20719808340072632},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12774112820625305},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12263211607933044},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.11540031433105469},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0987887978553772},{"id":"https://openalex.org/C49324399","wikidata":"https://www.wikidata.org/wiki/Q466758","display_name":"Voltage divider","level":3,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126618501335","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126618501335","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8700000047683716,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W165778107","https://openalex.org/W1965131569","https://openalex.org/W2014645249","https://openalex.org/W2061851748","https://openalex.org/W2084471278","https://openalex.org/W2095603848","https://openalex.org/W2100575086","https://openalex.org/W2109256542","https://openalex.org/W2110025685","https://openalex.org/W2117394866","https://openalex.org/W2118072362","https://openalex.org/W2118949348","https://openalex.org/W2133280289","https://openalex.org/W2138032809","https://openalex.org/W2138487966","https://openalex.org/W2162153812","https://openalex.org/W2272905943","https://openalex.org/W2345881048"],"related_works":["https://openalex.org/W2097406788","https://openalex.org/W2181518041","https://openalex.org/W2380036739","https://openalex.org/W2067550547","https://openalex.org/W2369839784","https://openalex.org/W2312515415","https://openalex.org/W2356676691","https://openalex.org/W2353349205","https://openalex.org/W2365787994","https://openalex.org/W2770954656"],"abstract_inverted_index":{"In":[0,47],"software":[1],"defined":[2],"radio":[3,45],"(SDR)":[4],"receivers,":[5],"sample":[6,149],"rate":[7],"conversion":[8],"(SRC)":[9],"and":[10,68,141],"channelization":[11],"are":[12,89],"two":[13],"computational":[14,25,101],"intensive":[15],"tasks.":[16],"Coefficient-less":[17],"cascaded-integrator-comb":[18],"(CIC)":[19],"filters":[20],"achieve":[21],"SRC":[22],"with":[23,41,153],"low":[24,100,130],"complexity,":[26],"but":[27],"the":[28,42,84,87,91,154],"design":[29],"of":[30,64,73,139,144],"its":[31],"gain":[32,58],"droop":[33,59],"compensation":[34,60],"filter":[35,55,106],"involves":[36],"coefficients.":[37],"These":[38],"coefficients":[39,85],"vary":[40],"change":[43],"in":[44,71,86,146],"standards.":[46],"this":[48],"paper,":[49],"an":[50,110,142],"architecture":[51,128],"for":[52,57],"variable":[53],"digital":[54],"(VDF)":[56],"employing":[61,116],"a":[62,133],"set":[63],"fixed":[65],"coefficient":[66],"sub-filters":[67,88],"multi-dimensional":[69],"polynomials":[70],"terms":[72],"spectral":[74],"parameters":[75],"is":[76,107],"realized":[77],"based":[78],"on":[79,109],"distributed":[80],"arithmetic":[81],"(DA).":[82],"As":[83],"fixed,":[90],"proposed":[92,104,127],"method":[93],"uses":[94],"ROM-based":[95],"LUTs":[96],"giving":[97],"rise":[98],"to":[99],"complexity.":[102],"The":[103,126],"DA\u2013VDF":[105],"synthesized":[108],"application":[111],"specific":[112],"integrated":[113],"circuit":[114],"(ASIC)":[115],"CMOS":[117],"90[Formula:":[118],"see":[119],"text]nm":[120],"technology":[121],"using":[122],"Synopsis":[123],"Design":[124],"Complier.":[125],"achieves":[129],"latency":[131],"at":[132],"reduced":[134],"area":[135],"delay":[136],"product":[137],"(ADP)":[138],"78%":[140],"efficiency":[143],"72%":[145],"energy":[147],"per":[148],"(EPS)":[150],"when":[151],"compared":[152],"conventional":[155],"MAC-based":[156],"architecture.":[157]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}