{"id":"https://openalex.org/W2768298712","doi":"https://doi.org/10.1142/s0218126618501177","title":"A 3 mW 1.2\u20133.6 GHz Multi-Phase PLL-Based Clock Generator with TDC Assisted Auto-Calibration of Loop Bandwidth","display_name":"A 3 mW 1.2\u20133.6 GHz Multi-Phase PLL-Based Clock Generator with TDC Assisted Auto-Calibration of Loop Bandwidth","publication_year":2017,"publication_date":"2017-11-17","ids":{"openalex":"https://openalex.org/W2768298712","doi":"https://doi.org/10.1142/s0218126618501177","mag":"2768298712"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126618501177","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126618501177","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046741336","display_name":"Jili Zhang","orcid":"https://orcid.org/0000-0002-8421-3059"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jili Zhang","raw_affiliation_strings":["Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100345767","display_name":"Yu Li","orcid":"https://orcid.org/0000-0002-4260-1870"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yu Li","raw_affiliation_strings":["Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080182658","display_name":"Shengxi Diao","orcid":"https://orcid.org/0000-0001-6899-2614"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shengxi Diao","raw_affiliation_strings":["Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101763505","display_name":"Xuefei Bai","orcid":"https://orcid.org/0000-0003-0551-4353"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xuefei Bai","raw_affiliation_strings":["Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078740447","display_name":"Fujiang Lin","orcid":"https://orcid.org/0000-0001-9238-6737"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fujiang Lin","raw_affiliation_strings":["Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Science and Technology, University of Science and Technology of China, 433 Huangshan Rd, Hefei, Anhui 230027, P. R. China","institution_ids":["https://openalex.org/I126520041"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101763505"],"corresponding_institution_ids":["https://openalex.org/I126520041"],"apc_list":null,"apc_paid":null,"fwci":0.1433,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.52545551,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"27","issue":"08","first_page":"1850117","last_page":"1850117"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7614274621009827},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.6824753880500793},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.6470443606376648},{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.6190712451934814},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.5816393494606018},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.5764872431755066},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.5700253844261169},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.42877498269081116},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.42642003297805786},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37562641501426697},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.29419398307800293},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.19946709275245667},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.14312967658042908},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.12161135673522949},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11426761746406555},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.09859609603881836},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09197616577148438},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.0918855369091034}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7614274621009827},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.6824753880500793},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.6470443606376648},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.6190712451934814},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.5816393494606018},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.5764872431755066},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.5700253844261169},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.42877498269081116},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.42642003297805786},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37562641501426697},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.29419398307800293},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.19946709275245667},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.14312967658042908},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.12161135673522949},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11426761746406555},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.09859609603881836},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09197616577148438},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0918855369091034}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126618501177","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126618501177","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7400000095367432}],"awards":[],"funders":[{"id":"https://openalex.org/F4320325599","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1548579702","https://openalex.org/W1589093285","https://openalex.org/W1972768432","https://openalex.org/W1975831661","https://openalex.org/W2005120973","https://openalex.org/W2085307869","https://openalex.org/W2096434843","https://openalex.org/W2104147443","https://openalex.org/W2125158984","https://openalex.org/W2135281359","https://openalex.org/W2141107443","https://openalex.org/W2143645323","https://openalex.org/W2158180061","https://openalex.org/W2160063814","https://openalex.org/W2172440946","https://openalex.org/W2178610490","https://openalex.org/W2182756325","https://openalex.org/W2295656041","https://openalex.org/W2337276583","https://openalex.org/W2404540556"],"related_works":["https://openalex.org/W2141726610","https://openalex.org/W2976219355","https://openalex.org/W2061664740","https://openalex.org/W1994021281","https://openalex.org/W2139484866","https://openalex.org/W2540766993","https://openalex.org/W2089131288","https://openalex.org/W4242529045","https://openalex.org/W1600405202","https://openalex.org/W2911266525"],"abstract_inverted_index":{"A":[0],"PLL-based":[1],"clock":[2,68,169],"generator":[3,69,170],"with":[4,40,88],"an":[5,14],"auto-calibration":[6,11,205],"circuit":[7,12],"is":[8,58,70,95,119,141,194],"presented.":[9],"The":[10,29,55,67,91,168,191],"employs":[13],"oscillator-based":[15],"time-to-digital":[16],"converter":[17],"(TDC)":[18],"to":[19,60,84,137],"achieve":[20],"a":[21,41,48],"constant":[22],"loop":[23,62,202],"bandwidth":[24,63],"and":[25,64,78,105,127,152,161,184,204],"fast":[26],"lock":[27,93],"time.":[28],"TDC":[30],"measures":[31],"the":[32,115,145,149],"operating":[33,147],"frequency":[34,57],"of":[35,43,51],"[Formula:":[36,44,52,122,162],"see":[37,45,53,74,82,86,99,101,113,123,125,135,139,159,163,165,174,178,186,197],"text]-stage":[38],"ring-VCO":[39],"resolution":[42],"text]":[46],"in":[47,72],"time":[49,94],"period":[50],"text].":[54],"measured":[56],"utilized":[59],"calibrate":[61],"VCO":[65],"frequency.":[66],"designed":[71],"40[Formula:":[73],"text]nm":[75],"CMOS":[76],"process":[77],"operates":[79],"from":[80,133,176],"1.2[Formula:":[81],"text]GHz":[83,87],"3.6[Formula:":[85],"8-phase":[89],"outputs.":[90],"total":[92],"less":[96],"than":[97,121,157],"3[Formula:":[98,173],"text][Formula:":[100,124,164],"text]s":[102],"including":[103,200],"calibration":[104],"PLL":[106],"closed-loop":[107],"locking":[108],"processes.":[109],"Operating":[110],"at":[111,181,188],"3.2[Formula:":[112],"text]GHz,":[114],"in-band":[116],"phase":[117],"noise":[118],"better":[120,156],"text]dBc/Hz":[126],"root-mean":[128],"square":[129],"(RMS)":[130],"jitter":[131,151],"integrated":[132],"10[Formula:":[134],"text]KHz":[136],"100[Formula:":[138],"text]MHz":[140],"2":[142,199],"ps.":[143],"In":[144],"entire":[146],"range,":[148],"RMS":[150],"reference":[153],"spur":[154],"are":[155],"5.5[Formula:":[158],"text]ps":[160],"text]dBc/Hz,":[166],"respectively.":[167],"consumes":[171],"only":[172,195],"text]mW":[175,187],"1.1[Formula:":[177],"text]V":[179],"supply":[180],"high-frequency":[182],"end":[183],"1.6[Formula:":[185],"low-frequency":[189],"end.":[190],"active":[192],"area":[193],"0.04[Formula:":[196],"text]mm":[198],"on-chip":[201],"filter":[203],"circuits.":[206]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}