{"id":"https://openalex.org/W2759330247","doi":"https://doi.org/10.1142/s0218126618500779","title":"VLSI Implementation of High Speed Energy-Efficient Truncated Multiplier","display_name":"VLSI Implementation of High Speed Energy-Efficient Truncated Multiplier","publication_year":2017,"publication_date":"2017-09-25","ids":{"openalex":"https://openalex.org/W2759330247","doi":"https://doi.org/10.1142/s0218126618500779","mag":"2759330247"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126618500779","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126618500779","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036695518","display_name":"K. N. Vijeyakumar","orcid":"https://orcid.org/0000-0002-4540-9198"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"K. N. Vijeyakumar","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Dr. Mahalingam College of Engineering and Technology, Pollachi, Coimbatore 642003, India"],"raw_orcid":"https://orcid.org/0000-0002-4540-9198","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Dr. Mahalingam College of Engineering and Technology, Pollachi, Coimbatore 642003, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074617135","display_name":"S. Elango","orcid":"https://orcid.org/0000-0002-4608-1358"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Elango","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Coimbatore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Bannari Amman Institute of Technology, Sathyamangalam, Coimbatore, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032272749","display_name":"S. Kalaiselvi","orcid":"https://orcid.org/0000-0003-1923-3827"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Kalaiselvi","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Dr. Mahalingam College of Engineering and Technology, Pollachi, Coimbatore 642003, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Dr. Mahalingam College of Engineering and Technology, Pollachi, Coimbatore 642003, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5632,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.6943255,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"27","issue":"05","first_page":"1850077","last_page":"1850077"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9900000095367432,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.6904486417770386},{"id":"https://openalex.org/keywords/rounding","display_name":"Rounding","score":0.6894687414169312},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.6648368239402771},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6122750043869019},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.6053617000579834},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.5412836074829102},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5109955072402954},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.39797863364219666},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.36604228615760803},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22773858904838562},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.15455111861228943}],"concepts":[{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.6904486417770386},{"id":"https://openalex.org/C136625980","wikidata":"https://www.wikidata.org/wiki/Q663208","display_name":"Rounding","level":2,"score":0.6894687414169312},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.6648368239402771},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6122750043869019},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6053617000579834},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.5412836074829102},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5109955072402954},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.39797863364219666},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.36604228615760803},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22773858904838562},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.15455111861228943},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126618500779","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126618500779","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1981841469","https://openalex.org/W1986965723","https://openalex.org/W2000472729","https://openalex.org/W2040056309","https://openalex.org/W2071502273","https://openalex.org/W2073123623","https://openalex.org/W2087670726","https://openalex.org/W2138179663","https://openalex.org/W2141388876","https://openalex.org/W2158958240","https://openalex.org/W2161093394"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W4220780102","https://openalex.org/W2993667417","https://openalex.org/W2899196999","https://openalex.org/W2043766215","https://openalex.org/W3084720115","https://openalex.org/W4236921914","https://openalex.org/W2921918181","https://openalex.org/W2378016457","https://openalex.org/W2355563154"],"abstract_inverted_index":{"In":[0,132],"this":[1],"brief,":[2],"we":[3],"present":[4],"the":[5,22,57,61,102,144,150,164],"design":[6,167,180,202],"and":[7,13,29,46,88,116,129,156,176,191],"evaluation":[8,162],"of":[9,78,91,152,158,163,195,199],"a":[10,38,85],"high":[11],"speed":[12],"energy-efficient":[14],"truncated":[15,166,201],"multiplier":[16],"for":[17,71,203],"unsigned":[18],"multiplication,":[19],"such":[20],"that":[21,67],"average":[23],"absolute":[24,146],"error":[25,147],"due":[26,148],"to":[27,55,94,126,142,149,188],"truncation":[28],"rounding":[30,157],"is":[31,65,69,168],"kept":[32],"minimal.":[33],"The":[34,98],"proposed":[35,99,165,200],"algorithm":[36],"eliminates":[37,109],"few":[39,118,153],"least":[40,110,119],"significant":[41,120],"Partial":[42],"Product":[43,193],"(PP)":[44],"bits":[45,121,155],"adds":[47],"correction":[48,134],"bias":[49],"at":[50,138],"appropriate":[51,139],"PP":[52,96,154],"bit":[53,140],"positions":[54,141],"minimize":[56],"total":[58],"error.":[59],"From":[60],"literatures":[62],"reviewed,":[63],"it":[64],"clear":[66],"there":[68],"scope":[70],"reducing":[72],"delay":[73],"in":[74,122],"multiplication":[75,112],"using":[76,178],"sutras":[77],"ancient":[79],"vedic":[80],"mathematics.":[81],"This":[82],"work":[83],"uses":[84],"simple":[86],"\u201ccrosswise":[87],"vertical":[89],"sutra\u201d":[90],"Vedic":[92],"mathematics":[93],"generate":[95],"bits.":[97],"methodology":[100],"groups":[101],"input":[103],"into":[104],"[Formula:":[105,205],"see":[106,114,197,206],"text]/2":[107],"bits,":[108],"subgroup":[111,124],"([Formula:":[113],"text])":[115],"deletes":[117],"other":[123],"multiplications":[125],"reduce":[127,143],"area":[128],"power":[130],"dissipation.":[131],"addition,":[133],"biase":[135],"are":[136],"added":[137],"overall":[145],"elimination":[151],"final":[159],"product.":[160],"Experimental":[161],"carried":[169],"out":[170],"through":[171],"structural":[172],"level":[173],"VHDL":[174],"modeling":[175],"simulations":[177],"Synopsys":[179],"compiler.":[181],"Performance":[182],"analysis":[183],"revealed":[184],"Chip-Area":[185],"Ratio":[186],"(CAR%)":[187],"be":[189],"33.81%":[190],"Power-Delay":[192],"(PDP)":[194],"14.84[Formula:":[196],"text]pJ":[198],"an":[204],"text]":[207],"multiplication.":[208]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}