{"id":"https://openalex.org/W2560318699","doi":"https://doi.org/10.1142/s0218126617500773","title":"Low Power Design of a 1 V 8-bit 125 fJ Asynchronous SAR ADC with Binary Weighted Capacitive DAC","display_name":"Low Power Design of a 1 V 8-bit 125 fJ Asynchronous SAR ADC with Binary Weighted Capacitive DAC","publication_year":2016,"publication_date":"2016-12-05","ids":{"openalex":"https://openalex.org/W2560318699","doi":"https://doi.org/10.1142/s0218126617500773","mag":"2560318699"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126617500773","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126617500773","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051509359","display_name":"Anush Bekal","orcid":null},"institutions":[{"id":"https://openalex.org/I26072440","display_name":"Indian Institute of Information Technology Allahabad","ror":"https://ror.org/03rgjt374","country_code":"IN","type":"education","lineage":["https://openalex.org/I26072440"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Anush Bekal","raw_affiliation_strings":["Microelectronics Division, Indian Institute of Information Technology (IIIT-A), Allahabad-211012, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Division, Indian Institute of Information Technology (IIIT-A), Allahabad-211012, India","institution_ids":["https://openalex.org/I26072440"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014338032","display_name":"Shabi Tabassum","orcid":null},"institutions":[{"id":"https://openalex.org/I26072440","display_name":"Indian Institute of Information Technology Allahabad","ror":"https://ror.org/03rgjt374","country_code":"IN","type":"education","lineage":["https://openalex.org/I26072440"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Shabi Tabassum","raw_affiliation_strings":["Microelectronics Division, Indian Institute of Information Technology (IIIT-A), Allahabad-211012, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Division, Indian Institute of Information Technology (IIIT-A), Allahabad-211012, India","institution_ids":["https://openalex.org/I26072440"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108722448","display_name":"Manish Goswami","orcid":"https://orcid.org/0000-0002-7165-1412"},"institutions":[{"id":"https://openalex.org/I26072440","display_name":"Indian Institute of Information Technology Allahabad","ror":"https://ror.org/03rgjt374","country_code":"IN","type":"education","lineage":["https://openalex.org/I26072440"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manish Goswami","raw_affiliation_strings":["Microelectronics Division, Indian Institute of Information Technology (IIIT-A), Allahabad-211012, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Division, Indian Institute of Information Technology (IIIT-A), Allahabad-211012, India","institution_ids":["https://openalex.org/I26072440"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5051509359"],"corresponding_institution_ids":["https://openalex.org/I26072440"],"apc_list":null,"apc_paid":null,"fwci":0.1706,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.58748205,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"26","issue":"05","first_page":"1750077","last_page":"1750077"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8841100931167603},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.8207482695579529},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.5857996940612793},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5831294059753418},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.5506033301353455},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5281006693840027},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.5015952587127686},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.43803688883781433},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.43653690814971924},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.42989373207092285},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.42480552196502686},{"id":"https://openalex.org/keywords/capacitive-sensing","display_name":"Capacitive sensing","score":0.4246867001056671},{"id":"https://openalex.org/keywords/control-logic","display_name":"Control logic","score":0.41150134801864624},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38014620542526245},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.356283038854599},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.35510197281837463},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.25900939106941223},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2229296863079071},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.19909852743148804},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1915152668952942},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.15349388122558594}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8841100931167603},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.8207482695579529},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.5857996940612793},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5831294059753418},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.5506033301353455},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5281006693840027},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.5015952587127686},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.43803688883781433},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43653690814971924},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.42989373207092285},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.42480552196502686},{"id":"https://openalex.org/C206755178","wikidata":"https://www.wikidata.org/wiki/Q1131271","display_name":"Capacitive sensing","level":2,"score":0.4246867001056671},{"id":"https://openalex.org/C2776350369","wikidata":"https://www.wikidata.org/wiki/Q843479","display_name":"Control logic","level":2,"score":0.41150134801864624},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38014620542526245},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.356283038854599},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.35510197281837463},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.25900939106941223},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2229296863079071},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.19909852743148804},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1915152668952942},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.15349388122558594},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126617500773","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126617500773","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7200000286102295,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1481844782","https://openalex.org/W1536945048","https://openalex.org/W1640330043","https://openalex.org/W2015936895","https://openalex.org/W2018896644","https://openalex.org/W2036861355","https://openalex.org/W2049107348","https://openalex.org/W2050787461","https://openalex.org/W2097216498","https://openalex.org/W2108619270","https://openalex.org/W2109190350","https://openalex.org/W2111186324","https://openalex.org/W2118487382","https://openalex.org/W2118814875","https://openalex.org/W2134179788","https://openalex.org/W2155589054","https://openalex.org/W2264132138","https://openalex.org/W4231501498"],"related_works":["https://openalex.org/W2384756109","https://openalex.org/W2085381517","https://openalex.org/W4312516786","https://openalex.org/W1651218569","https://openalex.org/W2237508561","https://openalex.org/W2076314239","https://openalex.org/W2132410050","https://openalex.org/W4284685595","https://openalex.org/W364924225","https://openalex.org/W3013924136"],"abstract_inverted_index":{"The":[0,21,39,65,85,166,211],"work":[1],"proposes":[2],"an":[3,17,60,100,113,139],"improved":[4,44],"technique":[5],"to":[6,92,106,119],"design":[7],"a":[8,27,35,42,51,93,146,193],"low":[9],"power":[10,155,189,198],"8-bit":[11,203],"asynchronous":[12],"successive":[13,73],"approximation":[14,74],"register":[15],"(ASAR),":[16],"analog-to-digital":[18],"converter":[19],"(ADC).":[20],"proposed":[22,167],"ASAR":[23,29],"ADC":[24,133,168],"consists":[25],"of":[26,63,80,138,214],"comparator,":[28],"(digital":[30],"control":[31,68,110,123],"logic":[32,69,95],"block),":[33],"and":[34,54,58,142,156,172,200,219,228],"capacitive-digital-to-analog":[36],"convertor":[37],"(C-DAC).":[38],"comparator":[40,89],"is":[41,77,116],"preamplier-based":[43],"positive":[45],"feedback":[46],"latch":[47],"circuit":[48],"which":[49,182],"has":[50,169],"built-in":[52],"sample":[53,149],"hold":[55],"(S/H)":[56],"functionality":[57],"saves":[59,154],"enormous":[61],"amount":[62],"power.":[64],"implemented":[66],"digital":[67,109,122],"block":[70,124],"performing":[71],"the":[72,81,88,108,121,132,136,160],"(SA)":[75],"algorithm":[76],"totally":[78],"unrestrained":[79],"external":[82,114],"clock":[83,103,115,141],"pulse.":[84],"outputs":[86,97],"from":[87],"are":[90,221],"given":[91],"XOR":[94],"whose":[96],"serve":[98],"as":[99],"internally":[101],"generated":[102],"(ready":[104],"signal)":[105],"trigger":[107],"block.":[111],"Hence,":[112],"not":[117],"required":[118,161],"initiate":[120],"making":[125],"its":[126],"operation":[127],"asynchronous.":[128],"By":[129],"implementing":[130],"this,":[131],"can":[134,143],"circumvent":[135],"usage":[137],"oversampled":[140],"operate":[144],"on":[145,192],"single":[147,194],"low-speed":[148],"clock.":[150],"This,":[151],"in":[152,163,205],"turn,":[153],"it":[157],"cuts":[158],"down":[159],"resilience":[162],"sampling":[164],"rates.":[165],"been":[170],"designed":[171],"simulated":[173],"using":[174],"UMC-0.18[Formula:":[175],"see":[176,178,185,187,196,207,209,223,226,230],"text][Formula:":[177,186,208],"text]m":[179],"CMOS":[180],"technology":[181],"dissipates":[183],"32.18[Formula:":[184],"text]W":[188],"when":[190],"operated":[191],"1[Formula:":[195],"text]V":[197],"supply":[199],"achieves":[201],"complete":[202],"conversion":[204],"1.09[Formula:":[206],"text]s.":[210],"relative":[212],"accuracy":[213],"capacitor":[215],"ratio,":[216],"aperture":[217],"jitter":[218],"FOM":[220],"0.39[Formula:":[222],"text],":[224],"1.2[Formula:":[225],"text]ns":[227],"125[Formula:":[229],"text]fJ/conversion-step,":[231],"respectively.":[232]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
