{"id":"https://openalex.org/W2405880506","doi":"https://doi.org/10.1142/s0218126616501152","title":"Low Power Aging-Aware On-Chip Memory Structure Design by Duty Cycle Balancing","display_name":"Low Power Aging-Aware On-Chip Memory Structure Design by Duty Cycle Balancing","publication_year":2016,"publication_date":"2016-05-19","ids":{"openalex":"https://openalex.org/W2405880506","doi":"https://doi.org/10.1142/s0218126616501152","mag":"2405880506"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126616501152","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126616501152","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100328354","display_name":"Shuai Wang","orcid":"https://orcid.org/0000-0003-3946-4497"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Shuai Wang","raw_affiliation_strings":["State Key Laboratory of Novel Software Technology, Department of Computer Science and Technology, Nanjing University, Nanjing, Jiang Su 210046, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Novel Software Technology, Department of Computer Science and Technology, Nanjing University, Nanjing, Jiang Su 210046, China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086297619","display_name":"Jin Tao","orcid":"https://orcid.org/0000-0003-1066-1809"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tao Jin","raw_affiliation_strings":["State Key Laboratory of Novel Software Technology, Department of Computer Science and Technology, Nanjing University, Nanjing, Jiang Su 210046, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Novel Software Technology, Department of Computer Science and Technology, Nanjing University, Nanjing, Jiang Su 210046, China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012812762","display_name":"Chuanlei Zheng","orcid":"https://orcid.org/0000-0002-7317-826X"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chuanlei Zheng","raw_affiliation_strings":["State Key Laboratory of Novel Software Technology, Department of Computer Science and Technology, Nanjing University, Nanjing, Jiang Su 210046, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Novel Software Technology, Department of Computer Science and Technology, Nanjing University, Nanjing, Jiang Su 210046, China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089359190","display_name":"Guangshan Duan","orcid":null},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guangshan Duan","raw_affiliation_strings":["State Key Laboratory of Novel Software Technology, Department of Computer Science and Technology, Nanjing University, Nanjing, Jiang Su 210046, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Novel Software Technology, Department of Computer Science and Technology, Nanjing University, Nanjing, Jiang Su 210046, China","institution_ids":["https://openalex.org/I881766915"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100328354"],"corresponding_institution_ids":["https://openalex.org/I881766915"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.03844194,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"25","issue":"09","first_page":"1650115","last_page":"1650115"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.7299215197563171},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.6693097352981567},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6166499853134155},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.574721097946167},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5363795757293701},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.5347349643707275},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5031613707542419},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.46680501103401184},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45202210545539856},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4292391836643219},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.40714094042778015},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3455386161804199},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.24679350852966309},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.19497227668762207},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.1689492166042328},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.16838350892066956},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13554197549819946},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.13416147232055664},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11256471276283264},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.11147996783256531}],"concepts":[{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.7299215197563171},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.6693097352981567},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6166499853134155},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.574721097946167},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5363795757293701},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.5347349643707275},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5031613707542419},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.46680501103401184},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45202210545539856},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4292391836643219},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.40714094042778015},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3455386161804199},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.24679350852966309},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.19497227668762207},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.1689492166042328},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.16838350892066956},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13554197549819946},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.13416147232055664},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11256471276283264},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.11147996783256531},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126616501152","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126616501152","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8700000047683716}],"awards":[{"id":"https://openalex.org/G6667581590","display_name":null,"funder_award_id":"61321491","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1459415741","https://openalex.org/W1543975090","https://openalex.org/W2020295113","https://openalex.org/W2032094184","https://openalex.org/W2041424982","https://openalex.org/W2041938037","https://openalex.org/W2103792078","https://openalex.org/W2110027520","https://openalex.org/W2110999128","https://openalex.org/W2111664042","https://openalex.org/W2113115586","https://openalex.org/W2115016937","https://openalex.org/W2115157620","https://openalex.org/W2115194678","https://openalex.org/W2125169487","https://openalex.org/W2131054871","https://openalex.org/W2134111163","https://openalex.org/W2138787284","https://openalex.org/W2147968017","https://openalex.org/W2152870111","https://openalex.org/W2153456949","https://openalex.org/W2154451732","https://openalex.org/W2154614859","https://openalex.org/W2157468334","https://openalex.org/W2164406663","https://openalex.org/W2168116639","https://openalex.org/W2170382128","https://openalex.org/W3141284234","https://openalex.org/W3149855342"],"related_works":["https://openalex.org/W2026040430","https://openalex.org/W2547527796","https://openalex.org/W2517623286","https://openalex.org/W2071018290","https://openalex.org/W2549803267","https://openalex.org/W2497617944","https://openalex.org/W2167303720","https://openalex.org/W1563139915","https://openalex.org/W2061075966","https://openalex.org/W3147501184"],"abstract_inverted_index":{"The":[0,23,95,154],"degradation":[1,175],"of":[2,35,49,111,129,176],"CMOS":[3],"devices":[4,50],"over":[5],"the":[6,13,31,36,40,46,75,80,101,107,112,120,123,130,143,171,177,192,203],"lifetime":[7],"can":[8,99,160,189],"cause":[9],"severe":[10],"threat":[11],"to":[12,44,78,141,147],"system":[14],"performance":[15],"and":[16,61,89,173,198,209],"reliability":[17],"at":[18],"deep":[19],"submicron":[20],"semiconductor":[21],"technologies.":[22],"negative":[24,102],"bias":[25],"temperature":[26,172],"instability":[27],"(NBTI)":[28],"is":[29,51,126],"among":[30],"most":[32,131],"important":[33],"sources":[34],"aging":[37,82,103,121],"mechanisms.":[38],"Applying":[39],"traditional":[41],"guardbanding":[42],"technique":[43],"address":[45],"decreased":[47],"speed":[48],"too":[52],"costly.":[53],"On-chip":[54],"memory":[55,117,149,179],"structures,":[56],"such":[57],"as":[58],"register":[59,85,205],"files":[60],"on-chip":[62,116,178],"caches,":[63],"suffer":[64],"a":[65,163],"very":[66],"high":[67],"NBTI":[68,174,193],"stress.":[69],"In":[70],"this":[71],"paper,":[72],"we":[73,138],"propose":[74,140],"aging-aware":[76,97,152,158,187],"design":[77,98,159,188],"combat":[79],"NBTI-induced":[81],"in":[83,92,115,134],"integer":[84,204],"files,":[86],"data":[87,207],"caches":[88,91],"instruction":[90,210],"high-performance":[93],"microprocessors.":[94],"proposed":[96,155],"mitigate":[100],"effects":[104],"by":[105],"balancing":[106],"duty":[108],"cycle":[109],"ratio":[110],"internal":[113],"bits":[114],"structures.":[118,180],"Besides":[119],"problem,":[122],"power":[124,145,157,165,200],"consumption":[125],"also":[127,161],"one":[128],"prominent":[132],"issues":[133],"microprocessor":[135],"design.":[136,153],"Therefore,":[137],"further":[139,169],"apply":[142],"low":[144,156],"schemes":[146],"different":[148],"structures":[150],"under":[151],"achieve":[162],"significant":[164],"reduction,":[166],"which":[167],"will":[168],"reduce":[170,191],"Our":[181],"experimental":[182],"results":[183],"show":[184],"that":[185],"our":[186],"effectively":[190],"stress":[194],"with":[195],"30.8%,":[196],"64.5%":[197],"72.0%":[199],"saving":[201],"for":[202],"file,":[206],"cache":[208],"cache,":[211],"respectively.":[212]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}