{"id":"https://openalex.org/W2368728863","doi":"https://doi.org/10.1142/s0218126616501140","title":"High Performance VLSI Design of Diamond Search Algorithm for Fast Motion Estimation","display_name":"High Performance VLSI Design of Diamond Search Algorithm for Fast Motion Estimation","publication_year":2016,"publication_date":"2016-05-13","ids":{"openalex":"https://openalex.org/W2368728863","doi":"https://doi.org/10.1142/s0218126616501140","mag":"2368728863"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126616501140","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126616501140","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101486920","display_name":"Rohan Mukherjee","orcid":"https://orcid.org/0000-0002-6712-6949"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Rohan Mukherjee","raw_affiliation_strings":["Computer Vision Lab, Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur 721302, West Bengal, India"],"affiliations":[{"raw_affiliation_string":"Computer Vision Lab, Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur 721302, West Bengal, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111801703","display_name":"Vikrant Mahajan","orcid":null},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vikrant Mahajan","raw_affiliation_strings":["Computer Vision Lab, Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur 721302, West Bengal, India"],"affiliations":[{"raw_affiliation_string":"Computer Vision Lab, Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur 721302, West Bengal, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034075191","display_name":"Anindya Sundar Dhar","orcid":"https://orcid.org/0000-0001-5288-4715"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anindya Sundar Dhar","raw_affiliation_strings":["Computer Vision Lab, Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur 721302, West Bengal, India"],"affiliations":[{"raw_affiliation_string":"Computer Vision Lab, Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur 721302, West Bengal, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003667123","display_name":"Indrajit Chakrabarti","orcid":"https://orcid.org/0000-0003-4744-2132"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Indrajit Chakrabarti","raw_affiliation_strings":["Computer Vision Lab, Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur 721302, West Bengal, India"],"affiliations":[{"raw_affiliation_string":"Computer Vision Lab, Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology Kharagpur, Kharagpur 721302, West Bengal, India","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5101486920"],"corresponding_institution_ids":["https://openalex.org/I145894827"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.03108253,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"25","issue":"09","first_page":"1650114","last_page":"1650114"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.789404034614563},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7849757671356201},{"id":"https://openalex.org/keywords/motion-estimation","display_name":"Motion estimation","score":0.7506072521209717},{"id":"https://openalex.org/keywords/codec","display_name":"Codec","score":0.6062532663345337},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.5847151279449463},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5413565039634705},{"id":"https://openalex.org/keywords/video-processing","display_name":"Video processing","score":0.4894064962863922},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4738208055496216},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4281252920627594},{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.41363489627838135},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.41151660680770874},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3949580192565918},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.37527015805244446},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3645108938217163},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.30103951692581177}],"concepts":[{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.789404034614563},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7849757671356201},{"id":"https://openalex.org/C10161872","wikidata":"https://www.wikidata.org/wiki/Q557891","display_name":"Motion estimation","level":2,"score":0.7506072521209717},{"id":"https://openalex.org/C161765866","wikidata":"https://www.wikidata.org/wiki/Q184748","display_name":"Codec","level":2,"score":0.6062532663345337},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.5847151279449463},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5413565039634705},{"id":"https://openalex.org/C65483669","wikidata":"https://www.wikidata.org/wiki/Q3536669","display_name":"Video processing","level":2,"score":0.4894064962863922},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4738208055496216},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4281252920627594},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.41363489627838135},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.41151660680770874},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3949580192565918},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.37527015805244446},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3645108938217163},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.30103951692581177},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126616501140","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126616501140","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W110307079","https://openalex.org/W115216132","https://openalex.org/W178701193","https://openalex.org/W1503929165","https://openalex.org/W1974241445","https://openalex.org/W2020336974","https://openalex.org/W2029205800","https://openalex.org/W2039181402","https://openalex.org/W2081203487","https://openalex.org/W2081760819","https://openalex.org/W2097787789","https://openalex.org/W2099124466","https://openalex.org/W2110608248","https://openalex.org/W2116043296","https://openalex.org/W2117355431","https://openalex.org/W2122384831","https://openalex.org/W2128555948","https://openalex.org/W2129992224","https://openalex.org/W2133692010","https://openalex.org/W2134242878","https://openalex.org/W2141109916","https://openalex.org/W2143378411","https://openalex.org/W2143846397","https://openalex.org/W2146234902","https://openalex.org/W3142526730","https://openalex.org/W4243164749","https://openalex.org/W4254968059"],"related_works":["https://openalex.org/W1489503129","https://openalex.org/W2596938593","https://openalex.org/W4323657011","https://openalex.org/W2056812584","https://openalex.org/W2051701434","https://openalex.org/W2379517759","https://openalex.org/W2160581253","https://openalex.org/W2377064494","https://openalex.org/W2123169832","https://openalex.org/W2094705568"],"abstract_inverted_index":{"Motion":[0],"estimation":[1],"(ME)":[2],"accounts":[3],"for":[4,39,62,140],"the":[5,40,59,68,99,118,129],"major":[6],"part":[7],"of":[8,11,95,115],"computational":[9],"complexity":[10],"any":[12],"video":[13,64,137,147],"coding":[14],"standard.":[15],"The":[16,55,70],"diamond":[17,41],"search":[18,27,42],"(DS)":[19],"algorithm":[20],"is":[21,44,102],"widely":[22],"used":[23],"as":[24],"a":[25,36,91,113,136],"fast":[26],"technique":[28,43],"to":[29,90,104],"perform":[30],"motion":[31],"estimation.":[32],"In":[33],"this":[34],"paper,":[35],"novel":[37],"architecture":[38,57,131],"proposed":[45,56,119,130],"that":[46],"efficiently":[47],"handles":[48],"memory":[49],"addressing":[50],"and":[51,80,98,146],"reduces":[52],"hardware":[53],"complexity.":[54],"meets":[58],"speed":[60],"requirements":[61],"real-time":[63],"processing":[65],"without":[66],"compromising":[67],"area.":[69],"design":[71,120],"when":[72],"implemented":[73],"in":[74,135],"Verilog":[75],"HDL":[76],"on":[77],"Virtex-5":[78],"technology":[79],"synthesized":[81],"using":[82],"Xilinx":[83],"ISE":[84],"Design":[85],"Suite":[86],"12.4,":[87],"gives":[88],"rise":[89],"critical":[92],"path":[93],"delay":[94],"3.25":[96],"ns":[97],"equivalent":[100],"area":[101],"calculated":[103],"be":[105,133],"3.5[Formula:":[106],"see":[107],"text]K":[108],"gate":[109],"equivalent.":[110],"Working":[111],"at":[112],"frequency":[114],"308":[116],"MHz,":[117],"can":[121,132],"process":[122],"128":[123],"CIF":[124],"frames":[125],"per":[126],"second.":[127],"So,":[128],"incorporated":[134],"codec":[138],"targeted":[139],"commercial":[141],"devices":[142],"like":[143],"smart-phones,":[144],"camcorders":[145],"conferencing":[148],"system.":[149]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
