{"id":"https://openalex.org/W2007090975","doi":"https://doi.org/10.1142/s0218126615500292","title":"The Calculation and Anticipation Unit for Floating-Point Addition","display_name":"The Calculation and Anticipation Unit for Floating-Point Addition","publication_year":2014,"publication_date":"2014-11-30","ids":{"openalex":"https://openalex.org/W2007090975","doi":"https://doi.org/10.1142/s0218126615500292","mag":"2007090975"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126615500292","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126615500292","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026326765","display_name":"Linghao Li","orcid":"https://orcid.org/0000-0001-6415-1519"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Linghao Li","raw_affiliation_strings":["Electronic and Information Engineering School, Xi'an Jiao Tong University, Xi'an 710049, P. R. China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronic and Information Engineering School, Xi'an Jiao Tong University, Xi'an 710049, P. R. China","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101514317","display_name":"Zhibiao Shao","orcid":"https://orcid.org/0000-0003-1540-748X"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhibiao Shao","raw_affiliation_strings":["Electronic and Information Engineering School, Xi'an Jiao Tong University, Xi'an 710049, P. R. China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronic and Information Engineering School, Xi'an Jiao Tong University, Xi'an 710049, P. R. China","institution_ids":["https://openalex.org/I87445476"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I87445476"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.06288728,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"24","issue":"03","first_page":"1550029","last_page":"1550029"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/double-precision-floating-point-format","display_name":"Double-precision floating-point format","score":0.8181600570678711},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.7007496356964111},{"id":"https://openalex.org/keywords/single-precision-floating-point-format","display_name":"Single-precision floating-point format","score":0.6970285773277283},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.6963297128677368},{"id":"https://openalex.org/keywords/rounding","display_name":"Rounding","score":0.6559025049209595},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.631571888923645},{"id":"https://openalex.org/keywords/arithmetic-logic-unit","display_name":"Arithmetic logic unit","score":0.6301372051239014},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6076210737228394},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.5926622152328491},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.5910369157791138},{"id":"https://openalex.org/keywords/floating-point-unit","display_name":"Floating-point unit","score":0.5174763202667236},{"id":"https://openalex.org/keywords/unit","display_name":"Unit (ring theory)","score":0.495797723531723},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4631563723087311},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.43609803915023804},{"id":"https://openalex.org/keywords/anticipation","display_name":"Anticipation (artificial intelligence)","score":0.4291113615036011},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.4287121593952179},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.327109694480896},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.23734986782073975},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2263820469379425},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.17764529585838318},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09471741318702698},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07689422369003296}],"concepts":[{"id":"https://openalex.org/C35912277","wikidata":"https://www.wikidata.org/wiki/Q1243369","display_name":"Double-precision floating-point format","level":3,"score":0.8181600570678711},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.7007496356964111},{"id":"https://openalex.org/C133095886","wikidata":"https://www.wikidata.org/wiki/Q1307173","display_name":"Single-precision floating-point format","level":3,"score":0.6970285773277283},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6963297128677368},{"id":"https://openalex.org/C136625980","wikidata":"https://www.wikidata.org/wiki/Q663208","display_name":"Rounding","level":2,"score":0.6559025049209595},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.631571888923645},{"id":"https://openalex.org/C100276221","wikidata":"https://www.wikidata.org/wiki/Q192903","display_name":"Arithmetic logic unit","level":2,"score":0.6301372051239014},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6076210737228394},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.5926622152328491},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.5910369157791138},{"id":"https://openalex.org/C110305270","wikidata":"https://www.wikidata.org/wiki/Q733507","display_name":"Floating-point unit","level":3,"score":0.5174763202667236},{"id":"https://openalex.org/C122637931","wikidata":"https://www.wikidata.org/wiki/Q118084","display_name":"Unit (ring theory)","level":2,"score":0.495797723531723},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4631563723087311},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.43609803915023804},{"id":"https://openalex.org/C176777502","wikidata":"https://www.wikidata.org/wiki/Q4774623","display_name":"Anticipation (artificial intelligence)","level":2,"score":0.4291113615036011},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.4287121593952179},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.327109694480896},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.23734986782073975},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2263820469379425},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.17764529585838318},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09471741318702698},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07689422369003296},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C145420912","wikidata":"https://www.wikidata.org/wiki/Q853077","display_name":"Mathematics education","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126615500292","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126615500292","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2003042378","https://openalex.org/W2021817770","https://openalex.org/W2067536948","https://openalex.org/W2073320693","https://openalex.org/W2083869853","https://openalex.org/W2097366420","https://openalex.org/W2124020158","https://openalex.org/W2126762902","https://openalex.org/W2129589372","https://openalex.org/W2153039279"],"related_works":["https://openalex.org/W3215589575","https://openalex.org/W2116803521","https://openalex.org/W2363539709","https://openalex.org/W2797902698","https://openalex.org/W2596474508","https://openalex.org/W2888097634","https://openalex.org/W2534590166","https://openalex.org/W2895954159","https://openalex.org/W2075766225","https://openalex.org/W2007090975"],"abstract_inverted_index":{"Most":[0],"recent":[1],"microprocessors":[2],"present":[3],"multiple":[4],"special":[5],"functional":[6,17],"units":[7],"to":[8],"optimize":[9],"their":[10],"performance.":[11],"In":[12],"this":[13],"paper,":[14],"a":[15,85],"new":[16],"unit":[18,25,53,100],"called":[19],"the":[20,29,38,64,95,106,116,129,134,138,148,156,174,184,187],"calculation":[21,44],"and":[22,41,50,57,81,125,178],"anticipation":[23],"(C&A)":[24],"is":[26,37],"presented":[27],"for":[28,46,67],"IEEE":[30],"754":[31],"standard":[32],"floating-point":[33,68],"adder":[34],"(FPA)":[35],"that":[36,94],"most":[39],"important":[40],"frequently":[42],"used":[43],"part":[45],"both":[47],"modern":[48],"CPUs":[49],"GPUs.":[51],"C&A":[52,99],"parallelize":[54],"rounding":[55],"step":[56],"readjustment":[58],"step,":[59],"which":[60],"are":[61],"known":[62],"as":[63],"time-consuming":[65],"steps":[66],"addition":[69],"with":[70,98,155],"significand":[71],"addition.":[72],"Therefore":[73],"it":[74,168],"reduces":[75],"FPA":[76,87,97,136,159],"critical":[77,107,175],"path":[78,108,176],"delay":[79,132],"enormously,":[80],"even":[82],"more":[83],"decreases":[84],"little":[86],"area":[88,114,124,182],"occupation.":[89],"The":[90],"synthesis":[91],"results":[92],"show":[93],"double-precision":[96,135,158],"takes":[101,120,169],"about":[102,112,170],"17.17%":[103],"improvement":[104,127],"in":[105,123,128,147,173,183],"delay,":[109,177],"while":[110],"saves":[111,179],"8.32%":[113],"than":[115,133],"conventional":[117],"one.":[118],"It":[119],"5.90%":[121],"advantage":[122,172],"19.58%":[126],"worst":[130],"case":[131],"from":[137],"Open":[139],"Core":[140],"module":[141],"\"fpu_double\"":[142],"(rev":[143],"14":[144],"2010-02-13)":[145],"synthesized":[146,160],"same":[149],"0.13-\u03bcm":[150],"CMOS":[151,166],"bulk.":[152],"Furthermore,":[153],"comparing":[154],"two-path":[157],"using":[161],"LSI":[162],"Logic's":[163],"gflxp":[164],"0.11-\u03bcm":[165],"library,":[167],"4.30%":[171],"almost":[180],"one-third":[181],"number":[185],"of":[186],"individual":[188],"cells.":[189]},"counts_by_year":[],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}