{"id":"https://openalex.org/W2056731934","doi":"https://doi.org/10.1142/s0218126615500164","title":"Efficient RNS Converter via Two-Part RNS","display_name":"Efficient RNS Converter via Two-Part RNS","publication_year":2014,"publication_date":"2014-11-10","ids":{"openalex":"https://openalex.org/W2056731934","doi":"https://doi.org/10.1142/s0218126615500164","mag":"2056731934"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126615500164","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126615500164","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063162550","display_name":"Shiva TaghipourEivazi","orcid":"https://orcid.org/0000-0003-1456-3878"},"institutions":[{"id":"https://openalex.org/I155419210","display_name":"Islamic Azad University, Science and Research Branch","ror":"https://ror.org/03187yj51","country_code":"IR","type":"education","lineage":["https://openalex.org/I110525433","https://openalex.org/I155419210"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Shiva TaghipourEivazi","raw_affiliation_strings":["Department of Computer Engineering, Tehran Science and Research Branch, Islamic Azad University, Tehran, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Tehran Science and Research Branch, Islamic Azad University, Tehran, Iran","institution_ids":["https://openalex.org/I155419210"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002779288","display_name":"Mehdi Hosseinzadeh","orcid":null},"institutions":[{"id":"https://openalex.org/I155419210","display_name":"Islamic Azad University, Science and Research Branch","ror":"https://ror.org/03187yj51","country_code":"IR","type":"education","lineage":["https://openalex.org/I110525433","https://openalex.org/I155419210"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Mehdi Hosseinzadeh","raw_affiliation_strings":["Department of Computer Engineering, Tehran Science and Research Branch, Islamic Azad University, Tehran, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Tehran Science and Research Branch, Islamic Azad University, Tehran, Iran","institution_ids":["https://openalex.org/I155419210"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044323449","display_name":"Ahmad HabibizadNovin","orcid":null},"institutions":[{"id":"https://openalex.org/I1293555014","display_name":"Islamic Azad University of Tabriz","ror":"https://ror.org/04hnf9a51","country_code":"IR","type":"education","lineage":["https://openalex.org/I110525433","https://openalex.org/I1293555014"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Ahmad HabibizadNovin","raw_affiliation_strings":["Department of Computer Engineering, Islamic Azad University, Tabriz Branch, Tabriz, Iran","Department of Computer Engineering, Islamic Azad University (Tabriz Branch), Tabriz, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Islamic Azad University, Tabriz Branch, Tabriz, Iran","institution_ids":["https://openalex.org/I1293555014"]},{"raw_affiliation_string":"Department of Computer Engineering, Islamic Azad University (Tabriz Branch), Tabriz, Iran","institution_ids":["https://openalex.org/I1293555014"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.17656716,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"24","issue":"01","first_page":"1550016","last_page":"1550016"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9936000108718872,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/residue-number-system","display_name":"Residue number system","score":0.6259759068489075},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.596971333026886},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.5435343980789185},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.5403630137443542},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.520158588886261},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.499267578125},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4694862961769104},{"id":"https://openalex.org/keywords/moduli","display_name":"Moduli","score":0.4246442914009094},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4208073914051056},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36874616146087646},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3575049042701721},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3371540904045105},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.29614609479904175},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.27410465478897095},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.26834091544151306},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.20183733105659485},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1770102083683014},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.13694113492965698},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.10954633355140686},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.09946021437644958},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08066195249557495}],"concepts":[{"id":"https://openalex.org/C71480937","wikidata":"https://www.wikidata.org/wiki/Q3086516","display_name":"Residue number system","level":2,"score":0.6259759068489075},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.596971333026886},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.5435343980789185},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.5403630137443542},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.520158588886261},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.499267578125},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4694862961769104},{"id":"https://openalex.org/C121089165","wikidata":"https://www.wikidata.org/wiki/Q6889796","display_name":"Moduli","level":2,"score":0.4246442914009094},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4208073914051056},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36874616146087646},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3575049042701721},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3371540904045105},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29614609479904175},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.27410465478897095},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.26834091544151306},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.20183733105659485},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1770102083683014},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.13694113492965698},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.10954633355140686},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.09946021437644958},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08066195249557495},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126615500164","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126615500164","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6200000047683716}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1483115357","https://openalex.org/W2024914569","https://openalex.org/W2027973886","https://openalex.org/W2074313510","https://openalex.org/W2087096176","https://openalex.org/W2102803692","https://openalex.org/W2106224035","https://openalex.org/W2123828865","https://openalex.org/W2130409149","https://openalex.org/W2132236349","https://openalex.org/W2143420045","https://openalex.org/W2144693841","https://openalex.org/W2145800822","https://openalex.org/W2150541571","https://openalex.org/W2155095649"],"related_works":["https://openalex.org/W3170806431","https://openalex.org/W2357289797","https://openalex.org/W2542168764","https://openalex.org/W2015155483","https://openalex.org/W2148208586","https://openalex.org/W2076304632","https://openalex.org/W1852876249","https://openalex.org/W2169683161","https://openalex.org/W2146856939","https://openalex.org/W2071716811"],"abstract_inverted_index":{"In":[0,104],"this":[1,24],"paper,":[2,25],"a":[3],"high":[4],"speed":[5],"residue":[6],"to":[7,91,106,138,155],"binary":[8],"converter":[9,55,64,89,97,113,130],"for":[10,74,133],"three":[11],"moduli":[12],"set":[13],"{2n":[14],"-":[15],"1,":[16,19],"2n":[17],"+":[18],"2n}":[20],"is":[21,31,56,65],"presented":[22,96],"in":[23,46,98],"which":[26,71],"uses":[27],"two-part":[28,40],"RNS":[29],"and":[30,69,82,102,114,126,151],"based":[32,66],"on":[33,67,120],"mixed":[34],"radix":[35],"conversion":[36,152],"(MRC).":[37],"By":[38],"using":[39],"RNS,":[41],"the":[42,51,59,62,78,84,87,94,111,115,141,144,156],"number":[43,79],"of":[44,53,61,80,86,93,100,128],"modulus":[45,81],"each":[47,129],"part":[48],"decreases;":[49],"therefore":[50],"complexity":[52],"reverse":[54],"reduced.":[57],"Also,":[58],"architecture":[60],"proposed":[63,88,112,146],"subtractors":[68],"Multiplexers":[70],"are":[72],"suitable":[73],"VLSI":[75],"implementation.":[76],"Reducing":[77],"simplifying":[83],"structure":[85],"lead":[90],"improvement":[92],"latest":[95],"terms":[99],"area":[101,125],"delay.":[103],"order":[105],"obtain":[107],"an":[108],"accurate":[109],"comparison,":[110],"fastest":[116],"designs":[117],"were":[118],"implemented":[119],"Xilinx":[121],"12.1":[122],"FPGA":[123],"simulator,":[124],"delay":[127],"was":[131],"measured":[132],"various":[134],"word":[135],"widths":[136],"up":[137],"64-bit.":[139],"As":[140],"results":[142],"indicated":[143],"novel":[145],"method":[147],"has":[148],"better":[149],"Area":[150],"time":[153],"comparing":[154],"previous":[157],"designs.":[158]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}