{"id":"https://openalex.org/W2101166096","doi":"https://doi.org/10.1142/s0218126614500777","title":"ADDITIONAL HIGH-INPUT LOW-OUTPUT IMPEDANCE VOLTAGE-MODE ALL-PASS SECTIONS","display_name":"ADDITIONAL HIGH-INPUT LOW-OUTPUT IMPEDANCE VOLTAGE-MODE ALL-PASS SECTIONS","publication_year":2014,"publication_date":"2014-03-10","ids":{"openalex":"https://openalex.org/W2101166096","doi":"https://doi.org/10.1142/s0218126614500777","mag":"2101166096"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126614500777","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126614500777","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055012514","display_name":"Jitendra Mohan","orcid":"https://orcid.org/0000-0001-7159-3665"},"institutions":[{"id":"https://openalex.org/I154970844","display_name":"Jaypee Institute of Information Technology","ror":"https://ror.org/05sttyy11","country_code":"IN","type":"education","lineage":["https://openalex.org/I154970844"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"JITENDRA MOHAN","raw_affiliation_strings":["Department of Electronics and Communications Engineering, Jaypee Institute of Information Technology, Noida 201304, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communications Engineering, Jaypee Institute of Information Technology, Noida 201304, India","institution_ids":["https://openalex.org/I154970844"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049755553","display_name":"Sudhanshu Maheshwari","orcid":"https://orcid.org/0000-0003-4727-022X"},"institutions":[{"id":"https://openalex.org/I171210897","display_name":"Aligarh Muslim University","ror":"https://ror.org/03kw9gc02","country_code":"IN","type":"education","lineage":["https://openalex.org/I171210897"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"SUDHANSHU MAHESHWARI","raw_affiliation_strings":["Department of Electronics Engineering, Z. H. College of Engineering and Technology, Aligarh Muslim University, Aligarh 202002, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, Z. H. College of Engineering and Technology, Aligarh Muslim University, Aligarh 202002, India","institution_ids":["https://openalex.org/I171210897"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9619,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.76284609,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"23","issue":"06","first_page":"1450077","last_page":"1450077"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/current-conveyor","display_name":"Current conveyor","score":0.8866588473320007},{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.660519540309906},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5448203086853027},{"id":"https://openalex.org/keywords/high-impedance","display_name":"High impedance","score":0.5183926224708557},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5153312087059021},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.4816538393497467},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.4372440576553345},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4345112144947052},{"id":"https://openalex.org/keywords/mesh-analysis","display_name":"Mesh analysis","score":0.43367835879325867},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.42518752813339233},{"id":"https://openalex.org/keywords/output-impedance","display_name":"Output impedance","score":0.4104645550251007},{"id":"https://openalex.org/keywords/voltage-divider","display_name":"Voltage divider","score":0.396887868642807},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3273047208786011},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.3246271312236786},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2705022096633911},{"id":"https://openalex.org/keywords/dropout-voltage","display_name":"Dropout voltage","score":0.2334693968296051}],"concepts":[{"id":"https://openalex.org/C110252649","wikidata":"https://www.wikidata.org/wiki/Q5195095","display_name":"Current conveyor","level":4,"score":0.8866588473320007},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.660519540309906},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5448203086853027},{"id":"https://openalex.org/C174268685","wikidata":"https://www.wikidata.org/wiki/Q769127","display_name":"High impedance","level":3,"score":0.5183926224708557},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5153312087059021},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.4816538393497467},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.4372440576553345},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4345112144947052},{"id":"https://openalex.org/C55311165","wikidata":"https://www.wikidata.org/wiki/Q1852652","display_name":"Mesh analysis","level":5,"score":0.43367835879325867},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42518752813339233},{"id":"https://openalex.org/C58112919","wikidata":"https://www.wikidata.org/wiki/Q631203","display_name":"Output impedance","level":3,"score":0.4104645550251007},{"id":"https://openalex.org/C49324399","wikidata":"https://www.wikidata.org/wiki/Q466758","display_name":"Voltage divider","level":3,"score":0.396887868642807},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3273047208786011},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.3246271312236786},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2705022096633911},{"id":"https://openalex.org/C15032970","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Dropout voltage","level":4,"score":0.2334693968296051},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126614500777","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126614500777","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8399999737739563}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W246389411","https://openalex.org/W1966648029","https://openalex.org/W1966914807","https://openalex.org/W1970203984","https://openalex.org/W1974336469","https://openalex.org/W1985264417","https://openalex.org/W1992023063","https://openalex.org/W1997485355","https://openalex.org/W2041772295","https://openalex.org/W2041835814","https://openalex.org/W2044255284","https://openalex.org/W2045155677","https://openalex.org/W2051288772","https://openalex.org/W2061382773","https://openalex.org/W2067280905","https://openalex.org/W2069551198","https://openalex.org/W2087949796","https://openalex.org/W2095937120","https://openalex.org/W2114151862","https://openalex.org/W2116161142","https://openalex.org/W2121265045","https://openalex.org/W2121569531","https://openalex.org/W2122620836","https://openalex.org/W2132027356","https://openalex.org/W4240581704","https://openalex.org/W4254839687"],"related_works":["https://openalex.org/W2131739622","https://openalex.org/W2114595526","https://openalex.org/W2044942002","https://openalex.org/W2547790580","https://openalex.org/W4322743048","https://openalex.org/W2085820687","https://openalex.org/W4205395014","https://openalex.org/W2557706537","https://openalex.org/W2101166096","https://openalex.org/W1980511335"],"abstract_inverted_index":{"To":[0],"extend":[1],"the":[2,31,46,57],"existing":[3],"knowledge":[4],"on":[5],"first-order":[6,15],"voltage-mode":[7,16,62],"all-pass":[8,17],"filters,":[9],"this":[10],"paper":[11],"presents":[12],"two":[13],"novel":[14],"sections,":[18],"each":[19],"employing":[20],"single":[21],"fully":[22,34],"differential":[23,35],"second-generation":[24],"current":[25],"conveyor":[26,37],"(FDCCII)":[27],"being":[28],"used":[29],"as":[30],"newly":[32],"obtained":[33],"voltage":[36],"(FDVC),":[38],"a":[39,42],"resistor":[40],"and":[41,51],"grounded":[43],"capacitor.":[44],"Both":[45],"proposed":[47,58],"circuits":[48,59],"possess":[49],"high-input":[50],"low-output":[52],"impedance":[53],"feature,":[54],"which":[55],"makes":[56],"ideal":[60],"for":[61,72],"systems.":[63],"Non-ideal":[64],"study":[65],"along":[66],"with":[67],"simulation":[68],"results":[69],"is":[70],"given":[71],"validation.":[73]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}