{"id":"https://openalex.org/W2167801561","doi":"https://doi.org/10.1142/s0218126613400380","title":"FORMAL AND MODEL DRIVEN DESIGN OF A HIGH SPEED DATA TRANSMISSION CHANNEL","display_name":"FORMAL AND MODEL DRIVEN DESIGN OF A HIGH SPEED DATA TRANSMISSION CHANNEL","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2167801561","doi":"https://doi.org/10.1142/s0218126613400380","mag":"2167801561"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126613400380","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126613400380","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088020853","display_name":"Zhongkai Ji","orcid":null},"institutions":[{"id":"https://openalex.org/I162868743","display_name":"Tianjin University","ror":"https://ror.org/012tb2g32","country_code":"CN","type":"education","lineage":["https://openalex.org/I162868743"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"ZHONGKAI JI","raw_affiliation_strings":["School of Electronic Information Engineering, Tianjin University, Tianjin, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic Information Engineering, Tianjin University, Tianjin, China","institution_ids":["https://openalex.org/I162868743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100743738","display_name":"Jianguo Ma","orcid":"https://orcid.org/0000-0002-1984-2940"},"institutions":[{"id":"https://openalex.org/I162868743","display_name":"Tianjin University","ror":"https://ror.org/012tb2g32","country_code":"CN","type":"education","lineage":["https://openalex.org/I162868743"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"JIANGUO MA","raw_affiliation_strings":["School of Electronic Information Engineering, Tianjin University, Tianjin, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic Information Engineering, Tianjin University, Tianjin, China","institution_ids":["https://openalex.org/I162868743"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012724019","display_name":"Oliver Faust","orcid":"https://orcid.org/0000-0002-3979-4077"},"institutions":[{"id":"https://openalex.org/I162868743","display_name":"Tianjin University","ror":"https://ror.org/012tb2g32","country_code":"CN","type":"education","lineage":["https://openalex.org/I162868743"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"OLIVER FAUST","raw_affiliation_strings":["School of Electronic Information Engineering, Tianjin University, Tianjin, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic Information Engineering, Tianjin University, Tianjin, China","institution_ids":["https://openalex.org/I162868743"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100743738"],"corresponding_institution_ids":["https://openalex.org/I162868743"],"apc_list":null,"apc_paid":null,"fwci":0.3625,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.67180995,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"22","issue":"10","first_page":"1340038","last_page":"1340038"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11125","display_name":"Petri Nets in System Modeling","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/deadlock","display_name":"Deadlock","score":0.8156548738479614},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8041143417358398},{"id":"https://openalex.org/keywords/formal-methods","display_name":"Formal methods","score":0.654213547706604},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.6266829967498779},{"id":"https://openalex.org/keywords/communicating-sequential-processes","display_name":"Communicating sequential processes","score":0.5829119086265564},{"id":"https://openalex.org/keywords/transmission","display_name":"Transmission (telecommunications)","score":0.5768669843673706},{"id":"https://openalex.org/keywords/process-calculus","display_name":"Process calculus","score":0.5435606241226196},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.538635790348053},{"id":"https://openalex.org/keywords/data-transmission","display_name":"Data transmission","score":0.5385658740997314},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.48756951093673706},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.44012659788131714},{"id":"https://openalex.org/keywords/systems-design","display_name":"Systems design","score":0.4127081334590912},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.376708447933197},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3639777898788452},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3630818724632263},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.2585070729255676},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.24505415558815002},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.21040880680084229},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1842535138130188},{"id":"https://openalex.org/keywords/semantics","display_name":"Semantics (computer science)","score":0.1506834328174591},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14171463251113892},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08240124583244324}],"concepts":[{"id":"https://openalex.org/C159023740","wikidata":"https://www.wikidata.org/wiki/Q623276","display_name":"Deadlock","level":2,"score":0.8156548738479614},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8041143417358398},{"id":"https://openalex.org/C75606506","wikidata":"https://www.wikidata.org/wiki/Q1049183","display_name":"Formal methods","level":2,"score":0.654213547706604},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.6266829967498779},{"id":"https://openalex.org/C155214134","wikidata":"https://www.wikidata.org/wiki/Q1120460","display_name":"Communicating sequential processes","level":4,"score":0.5829119086265564},{"id":"https://openalex.org/C761482","wikidata":"https://www.wikidata.org/wiki/Q118093","display_name":"Transmission (telecommunications)","level":2,"score":0.5768669843673706},{"id":"https://openalex.org/C161771561","wikidata":"https://www.wikidata.org/wiki/Q1970286","display_name":"Process calculus","level":2,"score":0.5435606241226196},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.538635790348053},{"id":"https://openalex.org/C557945733","wikidata":"https://www.wikidata.org/wiki/Q389772","display_name":"Data transmission","level":2,"score":0.5385658740997314},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.48756951093673706},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.44012659788131714},{"id":"https://openalex.org/C31352089","wikidata":"https://www.wikidata.org/wiki/Q3750474","display_name":"Systems design","level":2,"score":0.4127081334590912},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.376708447933197},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3639777898788452},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3630818724632263},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2585070729255676},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.24505415558815002},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.21040880680084229},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1842535138130188},{"id":"https://openalex.org/C184337299","wikidata":"https://www.wikidata.org/wiki/Q1437428","display_name":"Semantics (computer science)","level":2,"score":0.1506834328174591},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14171463251113892},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08240124583244324},{"id":"https://openalex.org/C156325763","wikidata":"https://www.wikidata.org/wiki/Q1930895","display_name":"Operational semantics","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126613400380","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126613400380","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.7300000190734863,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320329860","display_name":"National Science and Technology Major Project","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1528179740","https://openalex.org/W1895974704","https://openalex.org/W1976170358","https://openalex.org/W1986702623","https://openalex.org/W2002006163","https://openalex.org/W2012991100","https://openalex.org/W2027185051","https://openalex.org/W2031111226","https://openalex.org/W2032483181","https://openalex.org/W2034613561","https://openalex.org/W2040822387","https://openalex.org/W2041130586","https://openalex.org/W2055710877","https://openalex.org/W2117641705","https://openalex.org/W2120149445","https://openalex.org/W2129788823","https://openalex.org/W2131740154","https://openalex.org/W2159824857","https://openalex.org/W2169687938","https://openalex.org/W2176300081","https://openalex.org/W4211008702","https://openalex.org/W4250494863"],"related_works":["https://openalex.org/W2077122591","https://openalex.org/W2960457378","https://openalex.org/W2039317558","https://openalex.org/W2161401924","https://openalex.org/W2106938308","https://openalex.org/W2163770473","https://openalex.org/W4285251099","https://openalex.org/W1990409638","https://openalex.org/W1975586790","https://openalex.org/W2357898656"],"abstract_inverted_index":{"This":[0,85],"paper":[1],"presents":[2],"a":[3,11],"formal":[4,18,89,108],"and":[5,47,73,90,114,126],"model":[6,33,91],"driven":[7,92],"design":[8,93],"approach":[9],"for":[10],"high":[12,63],"speed":[13,64,95],"data":[14,65],"transmission":[15,66],"channel.":[16],"The":[17],"process":[19,98],"algebra":[20],"communicating":[21],"sequential":[22],"processes":[23],"(CSP)":[24],"was":[25,56],"used":[26],"to":[27,124,127],"specify":[28],"the":[29,54,79,83,97,118],"system":[30,40,119,130],"functionality.":[31],"Automated":[32],"checking":[34],"established,":[35,53],"beyond":[36],"reasonable":[37],"doubt,":[38],"important":[39],"properties,":[41],"such":[42],"as":[43],"freedom":[44],"from":[45],"deadlock":[46],"livelock.":[48],"Once":[49],"these":[50],"properties":[51],"were":[52],"functionality":[55,120],"translated":[57],"into":[58,102],"an":[59],"implementation":[60,80],"which":[61,121],"realizes":[62],"between":[67],"two":[68],"independent":[69],"IC":[70],"chips.":[71],"Normal":[72],"failure":[74],"case":[75],"testing":[76],"ensured":[77],"that":[78],"complies":[81],"with":[82],"specification.":[84],"work":[86],"shows":[87],"how":[88],"methodologies":[94],"up":[96],"of":[99,117],"turning":[100],"ideas":[101],"physical":[103],"problem":[104],"solutions.":[105],"More":[106],"specifically,":[107],"modeling":[109],"gave":[110],"us":[111,123],"firm":[112],"understanding":[113],"deep":[115],"insight":[116],"enabled":[122],"implement":[125],"select":[128],"correct":[129],"components.":[131]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
