{"id":"https://openalex.org/W2017334854","doi":"https://doi.org/10.1142/s0218126610006189","title":"AN ANALYTICAL CONGESTION MODEL WITH BOUNDED-BEND DETOURS","display_name":"AN ANALYTICAL CONGESTION MODEL WITH BOUNDED-BEND DETOURS","publication_year":2010,"publication_date":"2010-03-03","ids":{"openalex":"https://openalex.org/W2017334854","doi":"https://doi.org/10.1142/s0218126610006189","mag":"2017334854"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126610006189","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126610006189","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042735025","display_name":"Fei He","orcid":"https://orcid.org/0000-0002-4266-875X"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"FEI HE","raw_affiliation_strings":["School of Software, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology (TNList), Key Laboratory for Information System Security, Ministry of Education China, Beijing, 100084, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Software, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology (TNList), Key Laboratory for Information System Security, Ministry of Education China, Beijing, 100084, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5104049811","display_name":"Lerong Cheng","orcid":null},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"LERONG CHENG","raw_affiliation_strings":["EE Department, University of California, Los Angeles, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"EE Department, University of California, Los Angeles, USA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082437433","display_name":"Xiaoyu Song","orcid":"https://orcid.org/0000-0002-6583-9400"},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"XIAOYU SONG","raw_affiliation_strings":["ECE Department, Portland State University, Portland, OR 97207-0751, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ECE Department, Portland State University, Portland, OR 97207-0751, USA","institution_ids":["https://openalex.org/I126345244"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012354366","display_name":"Guowu Yang","orcid":"https://orcid.org/0000-0002-5133-0320"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"GUOWU YANG","raw_affiliation_strings":["School of CS, University of Electronic Science and Technology of China, Chengdu, 610054, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of CS, University of Electronic Science and Technology of China, Chengdu, 610054, China","institution_ids":["https://openalex.org/I150229711"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09443929,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"19","issue":"02","first_page":"479","last_page":"490"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.7421081066131592},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7005395889282227},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.6044265031814575},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6030949950218201},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.590346097946167},{"id":"https://openalex.org/keywords/bounded-function","display_name":"Bounded function","score":0.5501481294631958},{"id":"https://openalex.org/keywords/probabilistic-logic","display_name":"Probabilistic logic","score":0.5447157621383667},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.5160848498344421},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.46675634384155273},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.3405430316925049},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3326566815376282},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.32033857703208923},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.1722327470779419},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1702706217765808},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.15673649311065674},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15474936366081238},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12970536947250366}],"concepts":[{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.7421081066131592},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7005395889282227},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.6044265031814575},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6030949950218201},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.590346097946167},{"id":"https://openalex.org/C34388435","wikidata":"https://www.wikidata.org/wiki/Q2267362","display_name":"Bounded function","level":2,"score":0.5501481294631958},{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.5447157621383667},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.5160848498344421},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.46675634384155273},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.3405430316925049},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3326566815376282},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.32033857703208923},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.1722327470779419},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1702706217765808},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.15673649311065674},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15474936366081238},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12970536947250366},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126610006189","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126610006189","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1991530123","https://openalex.org/W2013783098","https://openalex.org/W2105616993","https://openalex.org/W2114675323"],"related_works":["https://openalex.org/W2181385951","https://openalex.org/W2169318242","https://openalex.org/W4205718258","https://openalex.org/W1727049600","https://openalex.org/W2059364457","https://openalex.org/W1989674257","https://openalex.org/W2183812348","https://openalex.org/W1481897060","https://openalex.org/W2132668926","https://openalex.org/W4313890168"],"abstract_inverted_index":{"With":[0],"the":[1,4,27,77],"increase":[2],"of":[3,6,30,79],"complexity":[5],"circuits,":[7],"fast":[8],"estimation":[9,40],"can":[10],"provide":[11],"some":[12],"vital":[13],"information":[14],"for":[15,58],"optimal":[16],"layout":[17,29],"decisions.":[18],"Fast":[19],"congestion":[20],"prediction":[21],"plays":[22],"an":[23],"important":[24],"role":[25],"in":[26],"physical":[28],"VLSI":[31],"design.":[32],"In":[33],"this":[34],"paper,":[35],"we":[36],"present":[37],"a":[38],"probabilistic":[39],"approach":[41],"with":[42],"via":[43],"minimization":[44],"constraints.":[45],"Our":[46],"model":[47],"is":[48],"more":[49,56,62],"realistic":[50],"than":[51],"previous":[52],"models.":[53],"It":[54],"has":[55],"flexibility":[57],"wires":[59],"to":[60,65],"have":[61],"usage":[63],"area":[64],"bypass":[66],"congested":[67],"regions":[68],"and":[69],"blockages.":[70],"The":[71],"experiment":[72],"on":[73],"routing":[74],"benchmarks":[75],"demonstrates":[76],"effectiveness":[78],"our":[80],"approach.":[81]},"counts_by_year":[],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
