{"id":"https://openalex.org/W2085118203","doi":"https://doi.org/10.1142/s0218126608004484","title":"A METHODOLOGY FOR SUPPORTING SYSTEM-LEVEL DESIGN SPACE EXPLORATION AT HIGHER LEVELS OF ABSTRACTION","display_name":"A METHODOLOGY FOR SUPPORTING SYSTEM-LEVEL DESIGN SPACE EXPLORATION AT HIGHER LEVELS OF ABSTRACTION","publication_year":2008,"publication_date":"2008-08-01","ids":{"openalex":"https://openalex.org/W2085118203","doi":"https://doi.org/10.1142/s0218126608004484","mag":"2085118203"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126608004484","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126608004484","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087527493","display_name":"J. Dedi\u010d","orcid":null},"institutions":[{"id":"https://openalex.org/I153976015","display_name":"University of Ljubljana","ror":"https://ror.org/05njb9z20","country_code":"SI","type":"education","lineage":["https://openalex.org/I153976015"]}],"countries":["SI"],"is_corresponding":false,"raw_author_name":"JOZE DEDIC","raw_affiliation_strings":["Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana, 1000, Slovenia","Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana 1000, Slovenia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana, 1000, Slovenia","institution_ids":["https://openalex.org/I153976015"]},{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana 1000, Slovenia","institution_ids":["https://openalex.org/I153976015"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020430857","display_name":"M. Finc","orcid":null},"institutions":[{"id":"https://openalex.org/I153976015","display_name":"University of Ljubljana","ror":"https://ror.org/05njb9z20","country_code":"SI","type":"education","lineage":["https://openalex.org/I153976015"]}],"countries":["SI"],"is_corresponding":false,"raw_author_name":"MATJAZ FINC","raw_affiliation_strings":["Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana, 1000, Slovenia","Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana 1000, Slovenia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana, 1000, Slovenia","institution_ids":["https://openalex.org/I153976015"]},{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana 1000, Slovenia","institution_ids":["https://openalex.org/I153976015"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084820164","display_name":"Andrej Tro\u0161t","orcid":"https://orcid.org/0000-0001-9641-5806"},"institutions":[{"id":"https://openalex.org/I153976015","display_name":"University of Ljubljana","ror":"https://ror.org/05njb9z20","country_code":"SI","type":"education","lineage":["https://openalex.org/I153976015"]}],"countries":["SI"],"is_corresponding":false,"raw_author_name":"ANDREJ TROST","raw_affiliation_strings":["Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana, 1000, Slovenia","Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana 1000, Slovenia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana, 1000, Slovenia","institution_ids":["https://openalex.org/I153976015"]},{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, Ljubljana 1000, Slovenia","institution_ids":["https://openalex.org/I153976015"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6906,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.75681801,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"17","issue":"04","first_page":"703","last_page":"727"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6973036527633667},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.6445032954216003},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.6405074000358582},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5644187927246094},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5415551662445068},{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.5273124575614929},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4984607696533203},{"id":"https://openalex.org/keywords/high-level-design","display_name":"High-level design","score":0.4507659375667572},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.442425936460495},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.37292754650115967},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23562654852867126},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.2013196051120758},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1436942219734192},{"id":"https://openalex.org/keywords/iterative-design","display_name":"Iterative design","score":0.12146198749542236}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6973036527633667},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.6445032954216003},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.6405074000358582},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5644187927246094},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5415551662445068},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.5273124575614929},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4984607696533203},{"id":"https://openalex.org/C78246475","wikidata":"https://www.wikidata.org/wiki/Q5754546","display_name":"High-level design","level":4,"score":0.4507659375667572},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.442425936460495},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.37292754650115967},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23562654852867126},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.2013196051120758},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1436942219734192},{"id":"https://openalex.org/C106246047","wikidata":"https://www.wikidata.org/wiki/Q4928435","display_name":"Iterative design","level":3,"score":0.12146198749542236},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126608004484","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126608004484","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5099999904632568,"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W115216132","https://openalex.org/W1540202708","https://openalex.org/W1555430580","https://openalex.org/W2020003990","https://openalex.org/W2073906129","https://openalex.org/W2088572851","https://openalex.org/W2139011599","https://openalex.org/W2150408604","https://openalex.org/W4237574101","https://openalex.org/W4254116315"],"related_works":["https://openalex.org/W2042762783","https://openalex.org/W2269990635","https://openalex.org/W2548514518","https://openalex.org/W4285464654","https://openalex.org/W4281926497","https://openalex.org/W2906427691","https://openalex.org/W2507786429","https://openalex.org/W2975035977","https://openalex.org/W1567432572","https://openalex.org/W3146054601"],"abstract_inverted_index":{"The":[0],"complexity":[1],"of":[2,17,64,105,131],"modern":[3],"embedded":[4],"systems":[5],"requires":[6],"a":[7,25,102,140],"revised":[8],"and":[9,14,20,37,67,88,114],"systematic":[10,89],"approach":[11,98],"to":[12,30,49],"efficient":[13],"concurrent":[15],"management":[16],"hardware":[18],"(HW)":[19],"software":[21],"(SW)":[22],"parts":[23],"in":[24],"codesign":[26,93,135],"process.":[27],"In":[28],"order":[29],"optimally":[31],"meet":[32],"the":[33,39,55,84,92,110,132],"ever-increasing":[34],"design":[35,43,86,120,128],"requirements":[36],"at":[38],"same":[40],"time":[41],"leverage":[42],"productivity,":[44],"higher":[45,103],"level":[46,104,119],"aspects":[47,63],"need":[48],"be":[50],"addressed":[51],"before":[52],"worrying":[53],"about":[54],"HW/SW":[56],"boundary.":[57],"This":[58],"paper":[59],"deals":[60],"with":[61,101,139],"high-level":[62,134],"system-level":[65],"modeling":[66,69],"provides":[68],"extension,":[70],"from":[71],"which":[72],"contemporary":[73],"related":[74],"methodologies":[75],"can":[76],"greatly":[77],"benefit.":[78],"High-level":[79],"aspects,":[80],"their":[81],"influence":[82],"on":[83],"entire":[85],"flow,":[87],"integration":[90],"into":[91],"environment":[94],"are":[95,122],"presented.":[96],"An":[97],"is":[99,137],"proposed":[100,133],"abstraction":[106],"that":[107],"helps":[108],"bridge":[109],"gap":[111],"between":[112],"informal":[113],"formal":[115],"system":[116],"specifications.":[117],"Higher":[118],"decisions":[121],"enabled,":[123],"avoiding":[124],"premature":[125],"ad":[126],"hoc":[127],"decisions.":[129],"Applicability":[130],"concepts":[136],"illustrated":[138],"case":[141],"study.":[142]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
