{"id":"https://openalex.org/W2103522624","doi":"https://doi.org/10.1142/s0218126606003210","title":"SIMD MULTIPLIERS FOR ACCELERATING EMBEDDED PROCESSORS IN FPGAs","display_name":"SIMD MULTIPLIERS FOR ACCELERATING EMBEDDED PROCESSORS IN FPGAs","publication_year":2006,"publication_date":"2006-08-01","ids":{"openalex":"https://openalex.org/W2103522624","doi":"https://doi.org/10.1142/s0218126606003210","mag":"2103522624"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126606003210","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126606003210","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074662921","display_name":"Stefania Perri","orcid":"https://orcid.org/0000-0003-1363-9201"},"institutions":[{"id":"https://openalex.org/I45204951","display_name":"University of Calabria","ror":"https://ror.org/02rc97e94","country_code":"IT","type":"education","lineage":["https://openalex.org/I45204951"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"STEFANIA PERRI","raw_affiliation_strings":["DEIS Department, University of Calabria, Via P. Bucci, Arcavacata di Rende, 87036 Rende, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DEIS Department, University of Calabria, Via P. Bucci, Arcavacata di Rende, 87036 Rende, Italy","institution_ids":["https://openalex.org/I45204951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056712990","display_name":"M.A. Iachino","orcid":null},"institutions":[{"id":"https://openalex.org/I59725666","display_name":"University of Reggio Calabria","ror":"https://ror.org/041sz8d87","country_code":"IT","type":"education","lineage":["https://openalex.org/I59725666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"MARIA ANTONIA IACHINO","raw_affiliation_strings":["DIMET Department, University of Reggio Calabria, Loc. Feo di Vito, 89060 Reggio Calabria, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DIMET Department, University of Reggio Calabria, Loc. Feo di Vito, 89060 Reggio Calabria, Italy","institution_ids":["https://openalex.org/I59725666"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003003043","display_name":"Pasquale Corsonello","orcid":"https://orcid.org/0000-0002-9528-1110"},"institutions":[{"id":"https://openalex.org/I45204951","display_name":"University of Calabria","ror":"https://ror.org/02rc97e94","country_code":"IT","type":"education","lineage":["https://openalex.org/I45204951"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"PASQUALE CORSONELLO","raw_affiliation_strings":["DEIS Department, University of Calabria, Via P. Bucci, Arcavacata di Rende, 87036 Rende, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DEIS Department, University of Calabria, Via P. Bucci, Arcavacata di Rende, 87036 Rende, Italy","institution_ids":["https://openalex.org/I45204951"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2808,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.56033143,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"15","issue":"04","first_page":"537","last_page":"550"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.7620674967765808},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7575730085372925},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7361230254173279},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.7341258525848389},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7306119203567505},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.6840031147003174},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5011782646179199},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38109540939331055},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3274931311607361}],"concepts":[{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.7620674967765808},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7575730085372925},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7361230254173279},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.7341258525848389},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7306119203567505},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.6840031147003174},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5011782646179199},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38109540939331055},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3274931311607361},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126606003210","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126606003210","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1542109965","https://openalex.org/W1856237264","https://openalex.org/W1981462524","https://openalex.org/W2039870651","https://openalex.org/W2113931351","https://openalex.org/W2146014558","https://openalex.org/W2156413870"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W4249632163","https://openalex.org/W2797161794","https://openalex.org/W2096938998","https://openalex.org/W1760305469","https://openalex.org/W1574948540"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,51],"new":[4,78],"efficient":[5],"32\u00d732":[6],"Single":[7],"Instruction":[8],"Multiple":[9],"Data":[10],"(SIMD)":[11],"multiplier":[12,47],"suitable":[13],"for":[14,72],"the":[15,46,77,81],"multimedia":[16],"extension":[17],"of":[18,54,62],"FPGA-based":[19,73],"processors.":[20],"The":[21],"proposed":[22,69],"circuit":[23,79],"can":[24],"adapt":[25],"itself":[26],"to":[27,85],"32-,":[28],"16-,":[29],"and":[30,36],"8-bit":[31],"operands":[32],"widths":[33],"avoiding":[34],"time":[35],"power":[37],"consuming":[38],"reconfiguration.":[39],"When":[40],"implemented":[41],"in":[42],"an":[43,59],"XCV400":[44],"device,":[45],"here":[48],"described":[49],"reaches":[50],"running":[52],"frequency":[53],"about":[55],"97":[56],"MHz":[57],"with":[58,67],"energy":[60],"dissipation":[61],"just":[63],"20":[64],"mW/MHz.":[65],"Comparisons":[66],"previously":[68],"SIMD":[70],"multipliers":[71],"designs":[74],"demonstrate":[75],"that":[76],"allows":[80],"best":[82],"area-time-power":[83],"trade-off":[84],"be":[86],"obtained.":[87]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
