{"id":"https://openalex.org/W2003518423","doi":"https://doi.org/10.1142/s0218126602000549","title":"A LOW-POWER PARAMETERIZED HARDWARE DESIGN FOR THE ONE-DIMENSIONAL DISCRETE FOURIER TRANSFORM OF VARIABLE LENGTHS","display_name":"A LOW-POWER PARAMETERIZED HARDWARE DESIGN FOR THE ONE-DIMENSIONAL DISCRETE FOURIER TRANSFORM OF VARIABLE LENGTHS","publication_year":2002,"publication_date":"2002-08-01","ids":{"openalex":"https://openalex.org/W2003518423","doi":"https://doi.org/10.1142/s0218126602000549","mag":"2003518423"},"language":"en","primary_location":{"id":"doi:10.1142/s0218126602000549","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126602000549","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022312926","display_name":"Jiun-In Guo","orcid":"https://orcid.org/0000-0003-0402-2621"},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"JIUN-IN GUO","raw_affiliation_strings":["Department of Computer Science and  Information Engineering, National Chung Cheng University,  Chia-Yi 621, Taiwan, R.O.C","Institute of Electronics"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and  Information Engineering, National Chung Cheng University,  Chia-Yi 621, Taiwan, R.O.C","institution_ids":["https://openalex.org/I148099254"]},{"raw_affiliation_string":"Institute of Electronics","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111625701","display_name":"Chien-Chang Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"CHIEN-CHANG LIN","raw_affiliation_strings":["Department of Computer Science and  Information Engineering, National Chung Cheng University,  Chia-Yi 621, Taiwan, R.O.C","Department of Computer Science and Information Engineering, National Chung Cheng University, Chia-Yi 621, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and  Information Engineering, National Chung Cheng University,  Chia-Yi 621, Taiwan, R.O.C","institution_ids":["https://openalex.org/I148099254"]},{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Chung Cheng University, Chia-Yi 621, Taiwan, R.O.C","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039543019","display_name":"CHIH-DA CHIEN","orcid":null},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"CHIH-DA CHIEN","raw_affiliation_strings":["Department of Computer Science and  Information Engineering, National Chung Cheng University,  Chia-Yi 621, Taiwan, R.O.C","Department of Computer Science and Information Engineering, National Chung Cheng University, Chia-Yi 621, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and  Information Engineering, National Chung Cheng University,  Chia-Yi 621, Taiwan, R.O.C","institution_ids":["https://openalex.org/I148099254"]},{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Chung Cheng University, Chia-Yi 621, Taiwan, R.O.C","institution_ids":["https://openalex.org/I148099254"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5022312926"],"corresponding_institution_ids":["https://openalex.org/I148099254"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.11076339,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"11","issue":"04","first_page":"405","last_page":"426"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parameterized-complexity","display_name":"Parameterized complexity","score":0.7424689531326294},{"id":"https://openalex.org/keywords/discrete-fourier-transform","display_name":"Discrete Fourier transform (general)","score":0.6958124041557312},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5905760526657104},{"id":"https://openalex.org/keywords/circular-convolution","display_name":"Circular convolution","score":0.5674781203269958},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5243240594863892},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4992384910583496},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4386001527309418},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4312739968299866},{"id":"https://openalex.org/keywords/variable","display_name":"Variable (mathematics)","score":0.41844603419303894},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3811664879322052},{"id":"https://openalex.org/keywords/fourier-transform","display_name":"Fourier transform","score":0.270505428314209},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.24698054790496826},{"id":"https://openalex.org/keywords/fourier-analysis","display_name":"Fourier analysis","score":0.10131621360778809}],"concepts":[{"id":"https://openalex.org/C165464430","wikidata":"https://www.wikidata.org/wiki/Q1570441","display_name":"Parameterized complexity","level":2,"score":0.7424689531326294},{"id":"https://openalex.org/C57733114","wikidata":"https://www.wikidata.org/wiki/Q1006032","display_name":"Discrete Fourier transform (general)","level":5,"score":0.6958124041557312},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5905760526657104},{"id":"https://openalex.org/C194980680","wikidata":"https://www.wikidata.org/wiki/Q245450","display_name":"Circular convolution","level":5,"score":0.5674781203269958},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5243240594863892},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4992384910583496},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4386001527309418},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4312739968299866},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.41844603419303894},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3811664879322052},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.270505428314209},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.24698054790496826},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.10131621360778809},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C76563020","wikidata":"https://www.wikidata.org/wiki/Q4817582","display_name":"Fractional Fourier transform","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0218126602000549","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0218126602000549","pdf_url":null,"source":{"id":"https://openalex.org/S167602672","display_name":"Journal of Circuits Systems and Computers","issn_l":"0218-1266","issn":["0218-1266","1793-6454"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Circuits, Systems and Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7099999785423279}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1971730389","https://openalex.org/W2009237857","https://openalex.org/W2095603848","https://openalex.org/W2115452265","https://openalex.org/W2121190917","https://openalex.org/W2127152294","https://openalex.org/W2131909533","https://openalex.org/W2133711459","https://openalex.org/W2143997026","https://openalex.org/W2154807244","https://openalex.org/W2159399605","https://openalex.org/W2162930902","https://openalex.org/W2166243422","https://openalex.org/W2172050917","https://openalex.org/W2566444836","https://openalex.org/W2625477228"],"related_works":["https://openalex.org/W2170755202","https://openalex.org/W2133436097","https://openalex.org/W61755830","https://openalex.org/W4386106541","https://openalex.org/W1611111716","https://openalex.org/W2106721858","https://openalex.org/W2135604443","https://openalex.org/W2053055950","https://openalex.org/W1981824873","https://openalex.org/W2110104525"],"abstract_inverted_index":{"This":[0,118],"paper":[1],"presents":[2],"a":[3,38,124],"new":[4],"low-power":[5],"parameterized":[6,39,125],"hardware":[7,40],"design":[8,41,62,91,108],"for":[9,42,136],"the":[10,22,43,71,79,89,106,138,149],"one-dimensional":[11],"(1D)":[12],"discrete":[13],"Fourier":[14],"transform":[15],"(DFT)":[16],"of":[17,45,58,67,73,95,112,141],"variable":[18,46],"lengths.":[19],"By":[20],"combining":[21],"cyclic":[23],"convolution":[24],"formulation,":[25],"block-based":[26],"distributed":[27],"arithmetic":[28],"(BDA),":[29],"and":[30,54,98],"Cooley\u2013Tukey":[31],"decomposition":[32],"algorithm":[33],"together,":[34],"we":[35,103],"have":[36],"developed":[37],"DFT":[44,68,85,126,153],"lengths":[47,66],"ranging":[48],"from":[49],"256":[50],"to":[51,122],"4096":[52],"points":[53],"with":[55,148],"different":[56,65,83,110,116,142],"modes":[57,111],"performance.":[59],"The":[60],"proposed":[61,107],"can":[63,104],"perform":[64],"computation":[69],"through":[70],"configuration":[72],"parameters,":[74],"which":[75],"not":[76],"only":[77],"provides":[78],"flexibility":[80],"in":[81,93,109],"computing":[82],"length":[84,152],"but":[86],"also":[87],"facilitates":[88],"performance-driven":[90],"considerations":[92],"terms":[94],"power":[96],"consumption":[97],"processing":[99],"speeds,":[100],"that":[101],"is,":[102],"configure":[105],"performance":[113],"by":[114],"setting":[115],"parameters.":[117],"feature":[119],"is":[120],"beneficial":[121],"developing":[123],"soft":[127],"Intellectual":[128],"Property":[129],"(IP)":[130],"core":[131,135],"or":[132],"hard":[133],"IP":[134],"meeting":[137],"system":[139],"requirements":[140],"silicon-on-a-chip":[143],"(SOC)":[144],"applications":[145],"as":[146],"compared":[147],"existing":[150],"fixed":[151],"designs.":[154]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}