{"id":"https://openalex.org/W2047739921","doi":"https://doi.org/10.1142/s0129053392000109","title":"AN EXPERIMENT WITH A LOGIC PROGRAM EXECUTION MODEL ON THE TRANSPUTER","display_name":"AN EXPERIMENT WITH A LOGIC PROGRAM EXECUTION MODEL ON THE TRANSPUTER","publication_year":1992,"publication_date":"1992-09-01","ids":{"openalex":"https://openalex.org/W2047739921","doi":"https://doi.org/10.1142/s0129053392000109","mag":"2047739921"},"language":"en","primary_location":{"id":"doi:10.1142/s0129053392000109","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0129053392000109","pdf_url":null,"source":{"id":"https://openalex.org/S112418432","display_name":"International Journal of High Speed Computing","issn_l":"0129-0533","issn":["0129-0533"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of High Speed Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100432243","display_name":"Kang Zhang","orcid":"https://orcid.org/0000-0003-3774-3775"},"institutions":[{"id":"https://openalex.org/I99043593","display_name":"Macquarie University","ror":"https://ror.org/01sf06y89","country_code":"AU","type":"education","lineage":["https://openalex.org/I99043593"]}],"countries":["AU"],"is_corresponding":true,"raw_author_name":"KANG ZHANG","raw_affiliation_strings":["Department of Computing, School of MPCE, Macquarie University, Sydney, NSW 2109, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computing, School of MPCE, Macquarie University, Sydney, NSW 2109, Australia","institution_ids":["https://openalex.org/I99043593"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5100432243"],"corresponding_institution_ids":["https://openalex.org/I99043593"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.16029793,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"04","issue":"03","first_page":"233","last_page":"249"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.9629179835319519},{"id":"https://openalex.org/keywords/dataflow-architecture","display_name":"Dataflow architecture","score":0.8790260553359985},{"id":"https://openalex.org/keywords/transputer","display_name":"Transputer","score":0.8644853234291077},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8529758453369141},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7373136878013611},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.5842190384864807},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4506051540374756},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.4234279990196228}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.9629179835319519},{"id":"https://openalex.org/C176727019","wikidata":"https://www.wikidata.org/wiki/Q1172415","display_name":"Dataflow architecture","level":3,"score":0.8790260553359985},{"id":"https://openalex.org/C2778319340","wikidata":"https://www.wikidata.org/wiki/Q776861","display_name":"Transputer","level":2,"score":0.8644853234291077},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8529758453369141},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7373136878013611},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.5842190384864807},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4506051540374756},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.4234279990196228}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1142/s0129053392000109","is_oa":false,"landing_page_url":"https://doi.org/10.1142/s0129053392000109","pdf_url":null,"source":{"id":"https://openalex.org/S112418432","display_name":"International Journal of High Speed Computing","issn_l":"0129-0533","issn":["0129-0533"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319815","host_organization_name":"World Scientific","host_organization_lineage":["https://openalex.org/P4310319815"],"host_organization_lineage_names":["World Scientific"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of High Speed Computing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2564598376","https://openalex.org/W1484403103","https://openalex.org/W2584408851","https://openalex.org/W2115158825","https://openalex.org/W2101960124","https://openalex.org/W2783505431","https://openalex.org/W2521947294","https://openalex.org/W2070353846","https://openalex.org/W4236419692","https://openalex.org/W2047739921"],"abstract_inverted_index":{"This":[0],"paper":[1],"discusses":[2],"an":[3],"experiment":[4],"with":[5],"a":[6,23,68],"dataflow":[7,24,49,58],"execution":[8,18,30],"model":[9,19,63],"for":[10,32],"logic":[11,54],"programs":[12],"implemented":[13,62],"on":[14,27,67],"the":[15,29,48,53,61],"transputer.":[16],"The":[17,36],"is":[20,34],"supported":[21],"by":[22],"virtual":[25],"machine,":[26],"which":[28],"mechanism":[31],"AND/OR-parallelism":[33],"developed.":[35],"real-time":[37],"evaluation":[38],"shows":[39],"that":[40],"small":[41],"scale":[42],"parallelism":[43],"can":[44],"be":[45],"exploited":[46],"from":[47,52],"graphs":[50],"compiled":[51],"programs.":[55],"A":[56],"conventional":[57],"architecture":[59],"supporting":[60],"has":[64],"been":[65],"emulated":[66],"multitransputer":[69],"system.":[70]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}