{"id":"https://openalex.org/W2156393819","doi":"https://doi.org/10.1109/vts.2006.46","title":"Minimal March Test Algorithm for Detection of Linked Static Faults in Random Access Memories","display_name":"Minimal March Test Algorithm for Detection of Linked Static Faults in Random Access Memories","publication_year":2006,"publication_date":"2006-05-25","ids":{"openalex":"https://openalex.org/W2156393819","doi":"https://doi.org/10.1109/vts.2006.46","mag":"2156393819"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2006.46","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2006.46","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"24th IEEE VLSI Test Symposium","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061611664","display_name":"G. Harutunyan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"G. Harutunyan","raw_affiliation_strings":["Virage Logic, Armenia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Virage Logic, Armenia","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017670571","display_name":"V.A. Vardanian","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"V.A. Vardanian","raw_affiliation_strings":["Virage Logic, Armenia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Virage Logic, Armenia","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108531152","display_name":"Y.Z. Zorian","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Y.Z. Zorian","raw_affiliation_strings":["Virage Logic, Fremont, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Virage Logic, Fremont, CA, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.342,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.79730229,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"120","last_page":"127"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/random-access","display_name":"Random access","score":0.6972216963768005},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6459100842475891},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.628583550453186},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5008120536804199},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.45778006315231323},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11269530653953552}],"concepts":[{"id":"https://openalex.org/C101722063","wikidata":"https://www.wikidata.org/wiki/Q218825","display_name":"Random access","level":2,"score":0.6972216963768005},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6459100842475891},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.628583550453186},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5008120536804199},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.45778006315231323},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11269530653953552},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2006.46","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2006.46","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"24th IEEE VLSI Test Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W289624287","https://openalex.org/W2078063367","https://openalex.org/W2097100364","https://openalex.org/W2100287799","https://openalex.org/W2106246015","https://openalex.org/W2106935654","https://openalex.org/W2110637318","https://openalex.org/W2144828465","https://openalex.org/W2160093572","https://openalex.org/W4241517697","https://openalex.org/W4247767635"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2051487156","https://openalex.org/W2073681303","https://openalex.org/W3133183159","https://openalex.org/W2390279801","https://openalex.org/W4297872561","https://openalex.org/W2952222336","https://openalex.org/W2358668433","https://openalex.org/W2116633494","https://openalex.org/W2376932109"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,81],"new":[4,24],"notion":[5],"of":[6,43,55,61,66,80,99],"2-composite":[7],"static":[8,16,68],"faults":[9,17,69],"covering":[10],"all":[11],"unlinked":[12],"and":[13],"(realistic)":[14],"linked":[15,25,44,67],"is":[18,74,98],"introduced.":[19],"We":[20,93],"have":[21],"introduced":[22],"120":[23],"fault":[26,45],"primitives":[27,46],"missing":[28],"in":[29,70],"the":[30,41,78,95],"paper":[31],"by":[32,49,91],"Hamdioui":[33],"et":[34,86],"al":[35],"(IEEE":[36],"TCAD":[37,89],"2004),":[38],"thus":[39],"extending":[40],"universe":[42],"known":[47,83],"before":[48],"25%.":[50],"A":[51],"march":[52],"test":[53,97],"algorithm":[54,84],"length":[56,79,101],"23N":[57],"(N":[58],"-":[59],"number":[60],"memory":[62],"words)":[63],"for":[64],"detection":[65],"random":[71],"access":[72],"memories":[73],"proposed.":[75],"It":[76],"reduces":[77],"previously":[82],"(Hamdioui":[85],"al.,":[87],"IEEE":[88],"2004)":[90],"18N.":[92],"proved":[94],"proposed":[96],"minimum":[100]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-08-12T21:12:35.861297","created_date":"2025-10-10T00:00:00"}