{"id":"https://openalex.org/W2149293549","doi":"https://doi.org/10.1109/vlsi.2008.35","title":"On the Use of Hash Tables for Efficient Analog Circuit Synthesis","display_name":"On the Use of Hash Tables for Efficient Analog Circuit Synthesis","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W2149293549","doi":"https://doi.org/10.1109/vlsi.2008.35","mag":"2149293549"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi.2008.35","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi.2008.35","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"21st International Conference on VLSI Design (VLSID 2008)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020554722","display_name":"Almitra Pradhan","orcid":null},"institutions":[{"id":"https://openalex.org/I63135867","display_name":"University of Cincinnati","ror":"https://ror.org/01e3m7079","country_code":"US","type":"education","lineage":["https://openalex.org/I63135867"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Almitra Pradhan","raw_affiliation_strings":["Department of ECE, University of Cincinnati, Cincinnati, OH, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, University of Cincinnati, Cincinnati, OH, USA","institution_ids":["https://openalex.org/I63135867"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040975645","display_name":"Ranga Vemuri","orcid":"https://orcid.org/0000-0002-4903-2746"},"institutions":[{"id":"https://openalex.org/I63135867","display_name":"University of Cincinnati","ror":"https://ror.org/01e3m7079","country_code":"US","type":"education","lineage":["https://openalex.org/I63135867"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ranga Vemuri","raw_affiliation_strings":["Department of ECE, University of Cincinnati, Cincinnati, OH, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, University of Cincinnati, Cincinnati, OH, USA","institution_ids":["https://openalex.org/I63135867"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I63135867"],"apc_list":null,"apc_paid":null,"fwci":1.8977,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.85225384,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"7","issue":null,"first_page":"647","last_page":"652"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/hash-function","display_name":"Hash function","score":0.7593339681625366},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7048837542533875},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6795573830604553},{"id":"https://openalex.org/keywords/double-hashing","display_name":"Double hashing","score":0.5352004170417786},{"id":"https://openalex.org/keywords/dynamic-perfect-hashing","display_name":"Dynamic perfect hashing","score":0.511137068271637},{"id":"https://openalex.org/keywords/convergence","display_name":"Convergence (economics)","score":0.5074896216392517},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.48784303665161133},{"id":"https://openalex.org/keywords/hash-table","display_name":"Hash table","score":0.4867973029613495},{"id":"https://openalex.org/keywords/matrix","display_name":"Matrix (chemical analysis)","score":0.444587379693985},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3753034770488739},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3442477583885193}],"concepts":[{"id":"https://openalex.org/C99138194","wikidata":"https://www.wikidata.org/wiki/Q183427","display_name":"Hash function","level":2,"score":0.7593339681625366},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7048837542533875},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6795573830604553},{"id":"https://openalex.org/C138111711","wikidata":"https://www.wikidata.org/wiki/Q478351","display_name":"Double hashing","level":4,"score":0.5352004170417786},{"id":"https://openalex.org/C122907437","wikidata":"https://www.wikidata.org/wiki/Q5318999","display_name":"Dynamic perfect hashing","level":5,"score":0.511137068271637},{"id":"https://openalex.org/C2777303404","wikidata":"https://www.wikidata.org/wiki/Q759757","display_name":"Convergence (economics)","level":2,"score":0.5074896216392517},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.48784303665161133},{"id":"https://openalex.org/C67388219","wikidata":"https://www.wikidata.org/wiki/Q207440","display_name":"Hash table","level":3,"score":0.4867973029613495},{"id":"https://openalex.org/C106487976","wikidata":"https://www.wikidata.org/wiki/Q685816","display_name":"Matrix (chemical analysis)","level":2,"score":0.444587379693985},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3753034770488739},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3442477583885193},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi.2008.35","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi.2008.35","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"21st International Conference on VLSI Design (VLSID 2008)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1539334032","https://openalex.org/W1555778358","https://openalex.org/W1583416477","https://openalex.org/W1979564935","https://openalex.org/W2096239072","https://openalex.org/W2120389957","https://openalex.org/W2125681407","https://openalex.org/W2131900240","https://openalex.org/W2142770304","https://openalex.org/W2157873272","https://openalex.org/W2161359911","https://openalex.org/W2161404350","https://openalex.org/W2753693129","https://openalex.org/W3145128584","https://openalex.org/W4233538641","https://openalex.org/W4242400079","https://openalex.org/W4248460126","https://openalex.org/W6634886283"],"related_works":["https://openalex.org/W102859714","https://openalex.org/W2136399778","https://openalex.org/W2088296667","https://openalex.org/W2333289748","https://openalex.org/W4251536634","https://openalex.org/W1551533237","https://openalex.org/W2765268849","https://openalex.org/W2334522381","https://openalex.org/W2171626009","https://openalex.org/W4385261619"],"abstract_inverted_index":{"Achieving":[0],"accurate":[1],"and":[2,60],"speedy":[3],"circuit":[4,19],"sizing":[5],"is":[6,51],"a":[7],"challenge":[8],"in":[9,28],"automated":[10],"analog":[11],"synthesis.":[12],"System":[13],"matrix":[14,31,41,56],"model":[15],"based":[16],"estimators":[17],"predict":[18],"performance":[20],"accurately.":[21],"In":[22],"this":[23],"paper":[24],"we":[25],"employ":[26],"hashing":[27],"conjunction":[29],"with":[30],"models":[32],"for":[33],"faster":[34],"synthesis":[35,48,71,92],"convergence.":[36,76],"With":[37],"hash":[38,63],"tables":[39,66],"some":[40],"element":[42],"recomputations":[43],"are":[44,67],"avoided,":[45],"thus":[46],"improving":[47],"time.":[49],"Hashing":[50],"effectively":[52],"performed":[53],"by":[54,91],"dividing":[55],"elements":[57],"into":[58],"classes":[59],"building":[61],"class-wise":[62],"tables.":[64],"Hash":[65],"updated":[68],"over":[69,88],"several":[70],"runs":[72],"which":[73],"further":[74],"expedites":[75],"Experimental":[77],"results":[78],"show":[79],"that":[80,89],"the":[81],"proposed":[82],"method":[83],"can":[84],"provide":[85],"4x-6x":[86],"speedup":[87],"offered":[90],"approaches":[93],"employing":[94],"macromodels":[95],"but":[96],"no":[97],"hashing.":[98]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}