{"id":"https://openalex.org/W2952643959","doi":"https://doi.org/10.1109/vlsi-dat.2019.8741737","title":"A CMOS 0.85-V 15.8-nW Current and Voltage Reference without Resistors","display_name":"A CMOS 0.85-V 15.8-nW Current and Voltage Reference without Resistors","publication_year":2019,"publication_date":"2019-04-01","ids":{"openalex":"https://openalex.org/W2952643959","doi":"https://doi.org/10.1109/vlsi-dat.2019.8741737","mag":"2952643959"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-dat.2019.8741737","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2019.8741737","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100378619","display_name":"Jing Wang","orcid":"https://orcid.org/0000-0002-9380-4467"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Jing Wang","raw_affiliation_strings":["Information, Production and Systems Research Center, Waseda University"],"affiliations":[{"raw_affiliation_string":"Information, Production and Systems Research Center, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008563407","display_name":"Hirofumi Shinohara","orcid":"https://orcid.org/0000-0001-5589-8397"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hirofumi Shinohara","raw_affiliation_strings":["Graduate School of Information, Production and Systems, Waseda University"],"affiliations":[{"raw_affiliation_string":"Graduate School of Information, Production and Systems, Waseda University","institution_ids":["https://openalex.org/I150744194"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5100378619"],"corresponding_institution_ids":["https://openalex.org/I150744194"],"apc_list":null,"apc_paid":null,"fwci":0.2934,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.54533666,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10468","display_name":"Photovoltaic System Optimization Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2105","display_name":"Renewable Energy, Sustainability and the Environment"},"field":{"id":"https://openalex.org/fields/21","display_name":"Energy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.8498085141181946},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7942256927490234},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5912798643112183},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5075384378433228},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4809543490409851},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.37550586462020874},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.336270809173584},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.334646999835968},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18852713704109192}],"concepts":[{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.8498085141181946},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7942256927490234},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5912798643112183},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5075384378433228},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4809543490409851},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.37550586462020874},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.336270809173584},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.334646999835968},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18852713704109192}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-dat.2019.8741737","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2019.8741737","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1995994759","https://openalex.org/W2013811245","https://openalex.org/W2047344047","https://openalex.org/W2083356181","https://openalex.org/W2143478854","https://openalex.org/W2151940289","https://openalex.org/W2160509435","https://openalex.org/W2592861018","https://openalex.org/W3086923348"],"related_works":["https://openalex.org/W3200817179","https://openalex.org/W1960166976","https://openalex.org/W2380067098","https://openalex.org/W1992708211","https://openalex.org/W1548152478","https://openalex.org/W2137172615","https://openalex.org/W2112564789","https://openalex.org/W2106247205","https://openalex.org/W2543503210","https://openalex.org/W1538049194"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3],"CMOS":[4,19,35],"sub-1-V":[5],"nanopower":[6],"reference":[7,25,28],"is":[8,11,32,71,79],"proposed,":[9],"which":[10],"realized":[12],"without":[13],"resistors":[14],"and":[15,27,53,63,74,94,101],"with":[16,34,39],"only":[17],"standard":[18],"transistors.":[20],"The":[21,43,67],"proposed":[22],"circuit":[23],"affords":[24],"current":[26,55],"voltage":[29,48,70],"simultaneously.":[30],"It":[31],"verified":[33],"180":[36],"nm":[37],"process":[38],"silicon":[40],"measurement":[41],"results.":[42],"temperature":[44],"coefficients":[45],"for":[46],"output":[47,54],"V":[49,73,90],"<sub":[50,57,91,96],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[51,58,92,97],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">ref</sub>":[52,59,93,98],"I":[56,95],"are":[60,99],"28":[61],"ppm/\u00b0C":[62],"138":[64],"ppm/\u00b0C,":[65],"respectively.":[66,103],"minimum":[68,76],"supply":[69],"0.85":[72],"the":[75,85,89],"power":[77],"consumption":[78],"achieved":[80],"about":[81],"15.8":[82],"nW.":[83],"Also,":[84],"line":[86],"regulations":[87],"of":[88],"0.74%/V":[100],"4.15%/V,":[102]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}