{"id":"https://openalex.org/W2950397511","doi":"https://doi.org/10.1109/vlsi-dat.2019.8741606","title":"A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-Threshold SRAMs","display_name":"A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-Threshold SRAMs","publication_year":2019,"publication_date":"2019-04-01","ids":{"openalex":"https://openalex.org/W2950397511","doi":"https://doi.org/10.1109/vlsi-dat.2019.8741606","mag":"2950397511"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-dat.2019.8741606","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2019.8741606","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015109763","display_name":"Lih\u2010Yih Chiou","orcid":"https://orcid.org/0000-0002-4161-5787"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Lih-Yih Chiou","raw_affiliation_strings":["Dept. Electrical Eng., National Cheng Kung University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Dept. Electrical Eng., National Cheng Kung University, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016538236","display_name":"Chi\u2010Ray Huang","orcid":"https://orcid.org/0000-0002-4953-2767"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chi-Ray Huang","raw_affiliation_strings":["Dept. Electrical Eng., National Cheng Kung University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Dept. Electrical Eng., National Cheng Kung University, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064138937","display_name":"Chang-Chieh Cheng","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chang-Chieh Cheng","raw_affiliation_strings":["Dept. Electrical Eng., National Cheng Kung University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Dept. Electrical Eng., National Cheng Kung University, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060850528","display_name":"Jingyu Huang","orcid":"https://orcid.org/0000-0002-8549-2520"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jing-Yu Huang","raw_affiliation_strings":["Dept. Electrical Eng., National Cheng Kung University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Dept. Electrical Eng., National Cheng Kung University, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069614165","display_name":"Wei-Suo Ling","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei-Suo Ling","raw_affiliation_strings":["Dept. Electrical Eng., National Cheng Kung University, Taiwan"],"affiliations":[{"raw_affiliation_string":"Dept. Electrical Eng., National Cheng Kung University, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5015109763"],"corresponding_institution_ids":["https://openalex.org/I91807558"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.04386022,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"43","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7375903129577637},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.6711704730987549},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.6286267042160034},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6126378774642944},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.5939584374427795},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5776522159576416},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5610478520393372},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.525769054889679},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5044611692428589},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.49415066838264465},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.46011003851890564},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4328835606575012},{"id":"https://openalex.org/keywords/stability","display_name":"Stability (learning theory)","score":0.42412081360816956},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3459509015083313},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2906327545642853},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2641136348247528},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10516378283500671},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07137492299079895}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7375903129577637},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.6711704730987549},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.6286267042160034},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6126378774642944},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.5939584374427795},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5776522159576416},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5610478520393372},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.525769054889679},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5044611692428589},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.49415066838264465},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.46011003851890564},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4328835606575012},{"id":"https://openalex.org/C112972136","wikidata":"https://www.wikidata.org/wiki/Q7595718","display_name":"Stability (learning theory)","level":2,"score":0.42412081360816956},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3459509015083313},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2906327545642853},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2641136348247528},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10516378283500671},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07137492299079895},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-dat.2019.8741606","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2019.8741606","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1753784006","https://openalex.org/W2003121308","https://openalex.org/W2031342191","https://openalex.org/W2061802739","https://openalex.org/W2080441840","https://openalex.org/W2094648661","https://openalex.org/W2095913060","https://openalex.org/W2098931949","https://openalex.org/W2134666877","https://openalex.org/W2134884071","https://openalex.org/W2150737648","https://openalex.org/W2160233105","https://openalex.org/W2173367578","https://openalex.org/W3151434794"],"related_works":["https://openalex.org/W2297319780","https://openalex.org/W2178217057","https://openalex.org/W1972800815","https://openalex.org/W2548830639","https://openalex.org/W4252086734","https://openalex.org/W2159770326","https://openalex.org/W1505038800","https://openalex.org/W2051027227","https://openalex.org/W4301258909","https://openalex.org/W2953793304"],"abstract_inverted_index":{"Read":[0],"stability":[1],"issues":[2],"resulting":[3],"from":[4],"PVT":[5],"variations":[6],"are":[7],"increasingly":[8],"important":[9],"when":[10,72],"operating":[11],"voltage":[12],"entering":[13],"the":[14,36,51,55,75,79],"near-threshold":[15,61],"region.":[16],"An":[17],"adaptive":[18],"local":[19],"column":[20],"sensing":[21,57],"keeper":[22,32],"scheme":[23,58],"is":[24],"proposed":[25,56],"to":[26,34,40,68],"detect":[27],"and":[28,62,65],"generate":[29],"an":[30],"appropriate":[31],"current":[33],"mitigate":[35],"issue":[37],"and,":[38],"simultaneously,":[39],"reduce":[41],"power":[42,70],"consumption.":[43],"Based":[44],"on":[45],"post-layout":[46],"simulations":[47],"using":[48],"90nm":[49],"technology,":[50],"SRAM":[52],"macro":[53],"with":[54,74],"can":[59],"support":[60],"sub-threshold":[63],"operation":[64],"achieve":[66],"up":[67],"24%":[69],"reduction":[71],"compared":[73],"conventional":[76],"design":[77],"in":[78],"worst-case":[80],"corner.":[81]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}