{"id":"https://openalex.org/W3212198386","doi":"https://doi.org/10.1109/vdat53777.2021.9601050","title":"FPGA based High Frequency Clock Phase Difference Measurement and Correction","display_name":"FPGA based High Frequency Clock Phase Difference Measurement and Correction","publication_year":2021,"publication_date":"2021-09-16","ids":{"openalex":"https://openalex.org/W3212198386","doi":"https://doi.org/10.1109/vdat53777.2021.9601050","mag":"3212198386"},"language":"en","primary_location":{"id":"doi:10.1109/vdat53777.2021.9601050","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vdat53777.2021.9601050","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 25th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073553977","display_name":"Ganesh Mulay","orcid":null},"institutions":[{"id":"https://openalex.org/I1289461252","display_name":"Indian Space Research Organisation","ror":"https://ror.org/00cwrns71","country_code":"IN","type":"government","lineage":["https://openalex.org/I1289461252","https://openalex.org/I3148377317"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Ganesh Mulay","raw_affiliation_strings":["Space Applications Centre, ISRO, Ahmedabad, India"],"affiliations":[{"raw_affiliation_string":"Space Applications Centre, ISRO, Ahmedabad, India","institution_ids":["https://openalex.org/I1289461252"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009920980","display_name":"Himanshu Patel","orcid":"https://orcid.org/0000-0002-2926-2819"},"institutions":[{"id":"https://openalex.org/I1289461252","display_name":"Indian Space Research Organisation","ror":"https://ror.org/00cwrns71","country_code":"IN","type":"government","lineage":["https://openalex.org/I1289461252","https://openalex.org/I3148377317"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Himanshu Patel","raw_affiliation_strings":["Space Applications Centre, ISRO, Ahmedabad, India"],"affiliations":[{"raw_affiliation_string":"Space Applications Centre, ISRO, Ahmedabad, India","institution_ids":["https://openalex.org/I1289461252"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103993879","display_name":"Manish Kumar","orcid":null},"institutions":[{"id":"https://openalex.org/I1289461252","display_name":"Indian Space Research Organisation","ror":"https://ror.org/00cwrns71","country_code":"IN","type":"government","lineage":["https://openalex.org/I1289461252","https://openalex.org/I3148377317"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manish Kumar","raw_affiliation_strings":["Space Applications Centre, ISRO, Ahmedabad, India"],"affiliations":[{"raw_affiliation_string":"Space Applications Centre, ISRO, Ahmedabad, India","institution_ids":["https://openalex.org/I1289461252"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041383022","display_name":"Kiral Ghodadra","orcid":null},"institutions":[{"id":"https://openalex.org/I1289461252","display_name":"Indian Space Research Organisation","ror":"https://ror.org/00cwrns71","country_code":"IN","type":"government","lineage":["https://openalex.org/I1289461252","https://openalex.org/I3148377317"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Kiral Ghodadra","raw_affiliation_strings":["Space Applications Centre, ISRO, Ahmedabad, India"],"affiliations":[{"raw_affiliation_string":"Space Applications Centre, ISRO, Ahmedabad, India","institution_ids":["https://openalex.org/I1289461252"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5073553977"],"corresponding_institution_ids":["https://openalex.org/I1289461252"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.1320812,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12300","display_name":"Advanced Electrical Measurement Techniques","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9884999990463257,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7711930871009827},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6779628992080688},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.5433046221733093},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.5242619514465332},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.4757278263568878},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.46505317091941833},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.41822579503059387},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3672693967819214},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36551862955093384},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3622260093688965},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12267893552780151},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.11794406175613403},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11649999022483826}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7711930871009827},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6779628992080688},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.5433046221733093},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.5242619514465332},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.4757278263568878},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.46505317091941833},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.41822579503059387},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3672693967819214},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36551862955093384},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3622260093688965},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12267893552780151},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.11794406175613403},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11649999022483826},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vdat53777.2021.9601050","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vdat53777.2021.9601050","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 25th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1547294555","https://openalex.org/W2765700245","https://openalex.org/W2807412106","https://openalex.org/W6632781949","https://openalex.org/W7024782547"],"related_works":["https://openalex.org/W2544043553","https://openalex.org/W2546284597","https://openalex.org/W2348562861","https://openalex.org/W2170552397","https://openalex.org/W2540393334","https://openalex.org/W2390042878","https://openalex.org/W2062932566","https://openalex.org/W2085828379","https://openalex.org/W2271847574","https://openalex.org/W2017144313"],"abstract_inverted_index":{"This":[0,122],"paper":[1,123],"describes":[2],"a":[3,43,93,138],"novel":[4],"scheme":[5],"for":[6,89],"FPGA":[7,88],"based":[8,25],"high":[9],"frequency":[10],"clock":[11,34,62],"phase":[12,60],"difference":[13],"measurement":[14],"and":[15,42,54,118,127],"correction":[16],"using":[17,32],"systematic":[18],"subsample":[19],"accumulation":[20],"approach.":[21],"Algorithm":[22],"uses":[23],"XOR":[24,52],"Phase":[26],"detector":[27],"signal":[28,53],"that":[29],"is":[30,46,74,83,112],"subsampled":[31],"on-board":[33],"of":[35,51,65,92,107,140],"375":[36],"KHz.":[37],"Accumulated":[38],"samples":[39],"are":[40,68],"averaged":[41],"mathematical":[44],"relation":[45],"established":[47],"between":[48,76],"duty":[49],"cycles":[50],"reference":[55],"signal.":[56],"Depending":[57],"on":[58,85],"measured":[59],"offset,":[61],"shift":[63],"bits":[64],"DAC":[66],"device":[67],"incremented":[69],"until":[70],"known":[71],"fixed":[72],"offset":[73],"identified":[75],"the":[77,105],"two":[78],"clocks.":[79],"The":[80],"logic":[81],"design":[82],"implemented":[84],"Virtex":[86],"5":[87],"digital":[90],"sub-system":[91],"space-borne":[94],"SAR":[95],"payload.":[96],"Realized":[97],"algorithm":[98,111,125],"clearly":[99],"distinguishes":[100],"different":[101],"possible":[102],"offsets":[103],"to":[104],"order":[106],"100":[108],"picoseconds.":[109],"Implemented":[110],"area":[113],"efficient":[114],"consuming":[115],"150":[116],"LUTs":[117],"130":[119],"registers":[120],"only.":[121],"discusses":[124],"development":[126],"implementation":[128],"thoroughly,":[129],"followed":[130],"by":[131],"flight":[132],"model":[133],"hardware":[134],"results":[135],"taken":[136],"over":[137],"range":[139],"temperatures.":[141]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}