{"id":"https://openalex.org/W3086327267","doi":"https://doi.org/10.1109/vdat50263.2020.9190415","title":"DynRP- Non-Intrusive Profiler for Dynamic Reconfigurability","display_name":"DynRP- Non-Intrusive Profiler for Dynamic Reconfigurability","publication_year":2020,"publication_date":"2020-07-01","ids":{"openalex":"https://openalex.org/W3086327267","doi":"https://doi.org/10.1109/vdat50263.2020.9190415","mag":"3086327267"},"language":"en","primary_location":{"id":"doi:10.1109/vdat50263.2020.9190415","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vdat50263.2020.9190415","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 24th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028741910","display_name":"Manpreet Kaur Jaswal","orcid":"https://orcid.org/0000-0003-1024-081X"},"institutions":[{"id":"https://openalex.org/I181514455","display_name":"International Institute of Information Technology Bangalore","ror":"https://ror.org/05h9eqy10","country_code":"IN","type":"education","lineage":["https://openalex.org/I181514455"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Manpreet Kaur Jaswal","raw_affiliation_strings":["International Institute of Information Technology Bangalore, Karnataka, India"],"affiliations":[{"raw_affiliation_string":"International Institute of Information Technology Bangalore, Karnataka, India","institution_ids":["https://openalex.org/I181514455"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020532266","display_name":"Subir Kumar Roy","orcid":"https://orcid.org/0000-0002-3554-1312"},"institutions":[{"id":"https://openalex.org/I181514455","display_name":"International Institute of Information Technology Bangalore","ror":"https://ror.org/05h9eqy10","country_code":"IN","type":"education","lineage":["https://openalex.org/I181514455"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Subir Kumar Roy","raw_affiliation_strings":["International Institute of Information Technology Bangalore, Karnataka, India"],"affiliations":[{"raw_affiliation_string":"International Institute of Information Technology Bangalore, Karnataka, India","institution_ids":["https://openalex.org/I181514455"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5028741910"],"corresponding_institution_ids":["https://openalex.org/I181514455"],"apc_list":null,"apc_paid":null,"fwci":0.231,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.48228804,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8980711102485657},{"id":"https://openalex.org/keywords/profiling","display_name":"Profiling (computer programming)","score":0.8939505815505981},{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.863487958908081},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7664674520492554},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5673854351043701},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.545220673084259},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5142847895622253},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4767785370349884},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.35696858167648315},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3390456438064575},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20726782083511353}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8980711102485657},{"id":"https://openalex.org/C187191949","wikidata":"https://www.wikidata.org/wiki/Q1138496","display_name":"Profiling (computer programming)","level":2,"score":0.8939505815505981},{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.863487958908081},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7664674520492554},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5673854351043701},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.545220673084259},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5142847895622253},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4767785370349884},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.35696858167648315},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3390456438064575},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20726782083511353},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vdat50263.2020.9190415","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vdat50263.2020.9190415","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 24th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1642387417","https://openalex.org/W1964983974","https://openalex.org/W1983412169","https://openalex.org/W2108424055","https://openalex.org/W2115294662","https://openalex.org/W2133027790","https://openalex.org/W2156347737","https://openalex.org/W2166622595","https://openalex.org/W2540839127","https://openalex.org/W2773522834","https://openalex.org/W4230022678"],"related_works":["https://openalex.org/W2152623100","https://openalex.org/W2096417281","https://openalex.org/W25204318","https://openalex.org/W2077035242","https://openalex.org/W2138895528","https://openalex.org/W3042643149","https://openalex.org/W1999203047","https://openalex.org/W3201977823","https://openalex.org/W2362203107","https://openalex.org/W2084703527"],"abstract_inverted_index":{"Emerging":[0],"technological":[1],"areas":[2],"such":[3,43],"as":[4],"machine":[5],"learning,":[6],"speech":[7],"recognition,":[8],"computer":[9],"vision,":[10],"autonomous":[11],"robots,":[12],"AI,":[13],"bioinformatics":[14],"involving":[15],"big":[16],"data,":[17],"require":[18],"implementation":[19,165],"in":[20,42,47,81,118],"complex":[21],"heterogeneous":[22],"accelerator":[23],"platforms,":[24],"to":[25,28,50,93,103,134],"be":[26,61],"able":[27],"handle":[29],"data":[30],"explosion":[31],"with":[32],"higher":[33],"efficiency,":[34],"lower":[35],"power,":[36],"and":[37,69,77,109,115,164],"better":[38],"performance.":[39,125],"Dynamic":[40],"reconfiguration":[41,152],"platforms":[44],"can":[45,60],"help":[46],"run-time":[48],"optimization":[49],"meet":[51],"the":[52,91,94,116,157],"design":[53,66,120,163],"goals.":[54],"The":[55],"required":[56],"optimal":[57,98,123],"platform":[58,99],"configuration":[59],"achieved":[62],"by":[63,161],"a":[64,132,146],"flexible":[65],"space":[67],"exploration":[68],"appropriate":[70],"task":[71],"partitioning":[72],"obtained":[73],"through":[74],"profiling":[75,105,124,138],"computation":[76],"communication":[78],"of":[79,96,142],"processes":[80],"application":[82],"code.":[83],"This":[84],"paper":[85],"focuses":[86],"on":[87,156],"profiling,":[88],"it":[89],"being":[90],"key":[92],"success":[95],"obtaining":[97,122],"configurations.":[100],"It":[101,126],"points":[102],"existing":[104],"techniques,":[106],"their":[107,119],"pros":[108],"cons":[110],"vis-\u00e0-vis":[111],"dynamic":[112,136,143,151],"reconfigurable":[113],"architectures,":[114],"challenges":[117],"for":[121,131,139,150],"further":[127],"outlines":[128],"desirable":[129,158],"specifications":[130],"profiler":[133,149],"allow":[135],"real-time":[137],"effective":[140],"use":[141],"reconfiguration.":[144],"DynRP,":[145],"non-intrusive":[147],"hardware":[148],"is":[153],"proposed":[154],"based":[155],"specifications,":[159],"followed":[160],"its":[162],"details.":[166]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}