{"id":"https://openalex.org/W1988813737","doi":"https://doi.org/10.1109/test.2011.6139164","title":"State of the art low capture power methodology","display_name":"State of the art low capture power methodology","publication_year":2011,"publication_date":"2011-09-01","ids":{"openalex":"https://openalex.org/W1988813737","doi":"https://doi.org/10.1109/test.2011.6139164","mag":"1988813737"},"language":"en","primary_location":{"id":"doi:10.1109/test.2011.6139164","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2011.6139164","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041963066","display_name":"Swapnil Bahl","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094169","display_name":"STMicroelectronics (India)","ror":"https://ror.org/00ft7bw25","country_code":"IN","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210094169"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Swapnil Bahl","raw_affiliation_strings":["Technology Research and Development, STMicroelectronics Limited, India","Technology Research and Development, STMicroelectronics India"],"affiliations":[{"raw_affiliation_string":"Technology Research and Development, STMicroelectronics Limited, India","institution_ids":["https://openalex.org/I4210094169"]},{"raw_affiliation_string":"Technology Research and Development, STMicroelectronics India","institution_ids":["https://openalex.org/I4210094169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039542079","display_name":"Roberto Mattiuzzo","orcid":null},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"R. Mattiuzzo","raw_affiliation_strings":["STMicroelectronics, Italy","Technology Research and Development, STMicroelectronics Italy"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"Technology Research and Development, STMicroelectronics Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069312258","display_name":"Shray Khullar","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094169","display_name":"STMicroelectronics (India)","ror":"https://ror.org/00ft7bw25","country_code":"IN","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210094169"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Shray Khullar","raw_affiliation_strings":["Technology Research and Development, STMicroelectronics Limited, India","Technology Research and Development, STMicroelectronics India"],"affiliations":[{"raw_affiliation_string":"Technology Research and Development, STMicroelectronics Limited, India","institution_ids":["https://openalex.org/I4210094169"]},{"raw_affiliation_string":"Technology Research and Development, STMicroelectronics India","institution_ids":["https://openalex.org/I4210094169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087649945","display_name":"Akhil Ranjan Garg","orcid":"https://orcid.org/0000-0003-1778-2718"},"institutions":[{"id":"https://openalex.org/I4210094169","display_name":"STMicroelectronics (India)","ror":"https://ror.org/00ft7bw25","country_code":"IN","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210094169"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Akhil Garg","raw_affiliation_strings":["Technology Research and Development, STMicroelectronics Limited, India","Technology Research and Development, STMicroelectronics India"],"affiliations":[{"raw_affiliation_string":"Technology Research and Development, STMicroelectronics Limited, India","institution_ids":["https://openalex.org/I4210094169"]},{"raw_affiliation_string":"Technology Research and Development, STMicroelectronics India","institution_ids":["https://openalex.org/I4210094169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085936158","display_name":"S. Graniello","orcid":null},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"S. Graniello","raw_affiliation_strings":["STMicroelectronics, Italy","Technology Research and Development, STMicroelectronics Italy"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"Technology Research and Development, STMicroelectronics Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091274032","display_name":"K.S. Abdel-Hafez","orcid":null},"institutions":[{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"Khader S. Abdel-Hafez","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc., 700 East Middlefield Road, Mountain View, CA 94043"],"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc., 700 East Middlefield Road, Mountain View, CA 94043","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065669855","display_name":"Salvatore Talluto","orcid":null},"institutions":[{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"Salvatore Talluto","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc., 700 East Middlefield Road, Mountain View, CA 94043"],"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc., 700 East Middlefield Road, Mountain View, CA 94043","institution_ids":["https://openalex.org/I1335490905"]}]}],"institutions":[],"countries_distinct_count":4,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5041963066"],"corresponding_institution_ids":["https://openalex.org/I4210094169"],"apc_list":null,"apc_paid":null,"fwci":1.0075,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.76758614,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.8598014116287231},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.6358524560928345},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5907250046730042},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5636085271835327},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.536052942276001},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.5150370597839355},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.48837941884994507},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.48575976490974426},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.46510156989097595},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.4501660466194153},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.44933176040649414},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35514914989471436},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35132455825805664},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31123241782188416},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.2631542384624481},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17727071046829224},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14345011115074158},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.09604451060295105},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09150266647338867}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.8598014116287231},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.6358524560928345},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5907250046730042},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5636085271835327},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.536052942276001},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.5150370597839355},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.48837941884994507},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.48575976490974426},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.46510156989097595},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.4501660466194153},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.44933176040649414},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35514914989471436},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35132455825805664},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31123241782188416},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.2631542384624481},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17727071046829224},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14345011115074158},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.09604451060295105},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09150266647338867},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2011.6139164","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2011.6139164","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8899999856948853,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W603405442","https://openalex.org/W1491971472","https://openalex.org/W1557977552","https://openalex.org/W1561562902","https://openalex.org/W1568407911","https://openalex.org/W1843801354","https://openalex.org/W1900996732","https://openalex.org/W1914799182","https://openalex.org/W1966348745","https://openalex.org/W1967602327","https://openalex.org/W1994851507","https://openalex.org/W2094983528","https://openalex.org/W2104677752","https://openalex.org/W2106303764","https://openalex.org/W2110490782","https://openalex.org/W2111569953","https://openalex.org/W2121190917","https://openalex.org/W2122270997","https://openalex.org/W2131261851","https://openalex.org/W2132881562","https://openalex.org/W2133456190","https://openalex.org/W2134980804","https://openalex.org/W2136680550","https://openalex.org/W2138654786","https://openalex.org/W2139356796","https://openalex.org/W2143629014","https://openalex.org/W2146893269","https://openalex.org/W2148244401","https://openalex.org/W2149280425","https://openalex.org/W2162547872","https://openalex.org/W2168247232","https://openalex.org/W2169839635","https://openalex.org/W2532005139","https://openalex.org/W2538602038","https://openalex.org/W2936804578","https://openalex.org/W4234481157","https://openalex.org/W4243807552","https://openalex.org/W6618342952","https://openalex.org/W6633205617","https://openalex.org/W6639759450","https://openalex.org/W6673884928","https://openalex.org/W6680497249","https://openalex.org/W6681451533","https://openalex.org/W6728900183"],"related_works":["https://openalex.org/W2157212570","https://openalex.org/W2543176856","https://openalex.org/W1897203488","https://openalex.org/W2764440971","https://openalex.org/W2616892825","https://openalex.org/W2624668974","https://openalex.org/W1837475237","https://openalex.org/W2124826473","https://openalex.org/W2121364018","https://openalex.org/W1502098592"],"abstract_inverted_index":{"Power":[0],"consumption":[1],"during":[2,9,76],"test":[3,77],"can":[4],"be":[5],"significantly":[6],"higher":[7],"than":[8],"normal":[10],"functional":[11],"mode.":[12,78],"This":[13],"paper":[14],"presents":[15],"a":[16,36],"low":[17,49],"power":[18,28,31,50,55,74],"Automated":[19],"Test":[20],"Pattern":[21],"Generation":[22],"(ATPG)":[23],"flow":[24],"for":[25,39],"managing":[26],"capture":[27],"in":[29],"today's":[30],"critical":[32],"designs.":[33],"It":[34],"introduces":[35],"novel":[37],"method":[38,64],"sequentially":[40],"enabling":[41],"the":[42,54,58,63],"on-chip":[43],"clock":[44],"controllers":[45],"to":[46],"generate":[47],"accurate":[48],"ATPG":[51],"patterns":[52],"respecting":[53],"specifications":[56],"of":[57,62],"design.":[59],"The":[60],"effectiveness":[61],"is":[65],"demonstrated":[66],"on":[67],"several":[68],"industrial":[69],"designs":[70],"that":[71],"show":[72],"up":[73],"issues":[75]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}