{"id":"https://openalex.org/W2153721856","doi":"https://doi.org/10.1109/test.2008.4700687","title":"Platform Independent Test Access Port Architecture","display_name":"Platform Independent Test Access Port Architecture","publication_year":2008,"publication_date":"2008-10-01","ids":{"openalex":"https://openalex.org/W2153721856","doi":"https://doi.org/10.1109/test.2008.4700687","mag":"2153721856"},"language":"en","primary_location":{"id":"doi:10.1109/test.2008.4700687","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2008.4700687","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054434272","display_name":"Arie Margulis","orcid":null},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"A. Margulis","raw_affiliation_strings":["AMD, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"AMD, ONT, Canada","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111828204","display_name":"D. Akselrod","orcid":null},"institutions":[{"id":"https://openalex.org/I98251732","display_name":"McMaster University","ror":"https://ror.org/02fa3aq29","country_code":"CA","type":"education","lineage":["https://openalex.org/I98251732"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"D. Akselrod","raw_affiliation_strings":["McMaster University, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"McMaster University, ONT, Canada","institution_ids":["https://openalex.org/I98251732"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001258549","display_name":"Timothy J. Wood","orcid":"https://orcid.org/0000-0001-9177-704X"},"institutions":[{"id":"https://openalex.org/I4210137977","display_name":"Advanced Micro Devices (United States)","ror":"https://ror.org/04kd6c783","country_code":"US","type":"company","lineage":["https://openalex.org/I4210137977"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. Wood","raw_affiliation_strings":["Advanced Micro Devices, Inc., Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc., Austin, TX, USA","institution_ids":["https://openalex.org/I4210137977"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037206983","display_name":"S. Metsis","orcid":null},"institutions":[{"id":"https://openalex.org/I4210137977","display_name":"Advanced Micro Devices (United States)","ror":"https://ror.org/04kd6c783","country_code":"US","type":"company","lineage":["https://openalex.org/I4210137977"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Metsis","raw_affiliation_strings":["AMD, MA, USA"],"affiliations":[{"raw_affiliation_string":"AMD, MA, USA","institution_ids":["https://openalex.org/I4210137977"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5054434272"],"corresponding_institution_ids":["https://openalex.org/I1311921367"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12729822,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6806184649467468},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.6784523725509644},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6586319208145142},{"id":"https://openalex.org/keywords/port","display_name":"Port (circuit theory)","score":0.6329437494277954},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6263324618339539},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.43342071771621704},{"id":"https://openalex.org/keywords/boundary-scan","display_name":"Boundary scan","score":0.43136265873908997},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4202568531036377},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.419760137796402},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3315116763114929},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24193164706230164},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16402432322502136},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.11436545848846436},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.07166451215744019}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6806184649467468},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.6784523725509644},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6586319208145142},{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.6329437494277954},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6263324618339539},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.43342071771621704},{"id":"https://openalex.org/C992767","wikidata":"https://www.wikidata.org/wiki/Q895156","display_name":"Boundary scan","level":3,"score":0.43136265873908997},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4202568531036377},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.419760137796402},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3315116763114929},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24193164706230164},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16402432322502136},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.11436545848846436},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.07166451215744019},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2008.4700687","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2008.4700687","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1614172680","https://openalex.org/W1904830904","https://openalex.org/W2167995399"],"related_works":["https://openalex.org/W1576317492","https://openalex.org/W79379040","https://openalex.org/W2046542368","https://openalex.org/W3142211975","https://openalex.org/W1879443270","https://openalex.org/W2018912978","https://openalex.org/W2130914040","https://openalex.org/W2119122672","https://openalex.org/W4292904049","https://openalex.org/W2136848245"],"abstract_inverted_index":{"In":[0],"this":[1],"work,":[2],"we":[3],"present":[4],"and":[5,43],"analyze":[6],"a":[7,29],"generic":[8],"test":[9],"access":[10],"port":[11],"(TAP)":[12],"architecture":[13,33],"capable":[14],"of":[15],"being":[16],"re-used":[17],"without":[18],"any":[19],"modifications":[20],"in":[21],"various":[22],"system-on-chip":[23],"(SoC)":[24],"ICs":[25],"as":[26,28],"well":[27],"\"modular":[30],"Jtag\"":[31],"multi-TAP":[32],"that":[34],"allows":[35],"embedded":[36],"IPs":[37],"to":[38],"control":[39],"their":[40],"boundary-scan":[41],"segments":[42],"be":[44],"IEEE":[45],"1149.1":[46],"compliant.":[47]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}