{"id":"https://openalex.org/W2074386368","doi":"https://doi.org/10.1109/test.2007.4437664","title":"Design-for-reliability: A soft error case study","display_name":"Design-for-reliability: A soft error case study","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2074386368","doi":"https://doi.org/10.1109/test.2007.4437664","mag":"2074386368"},"language":"en","primary_location":{"id":"doi:10.1109/test.2007.4437664","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2007.4437664","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100447306","display_name":"Ming Zhang","orcid":"https://orcid.org/0000-0002-9372-4926"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ming Zhang","raw_affiliation_strings":["Intel Corporation, Folsom, CA, USA","Intel Corporation,Folsom,CA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Folsom, CA, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation,Folsom,CA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5100447306"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12828211,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9950000047683716,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.9081596732139587},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7304609417915344},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6900336742401123},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.6662813425064087},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.6540031433105469},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5283212065696716},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5057525634765625},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.46039196848869324},{"id":"https://openalex.org/keywords/design-methods","display_name":"Design methods","score":0.43130651116371155},{"id":"https://openalex.org/keywords/circuit-reliability","display_name":"Circuit reliability","score":0.4217357933521271},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.24260705709457397},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.19590550661087036},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18884772062301636},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.12733668088912964},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.07674354314804077}],"concepts":[{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.9081596732139587},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7304609417915344},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6900336742401123},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.6662813425064087},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.6540031433105469},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5283212065696716},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5057525634765625},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.46039196848869324},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.43130651116371155},{"id":"https://openalex.org/C2778309119","wikidata":"https://www.wikidata.org/wiki/Q5121614","display_name":"Circuit reliability","level":4,"score":0.4217357933521271},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.24260705709457397},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.19590550661087036},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18884772062301636},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.12733668088912964},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.07674354314804077},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2007.4437664","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2007.4437664","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2121233497","https://openalex.org/W3048013713","https://openalex.org/W1970556122","https://openalex.org/W2074386368","https://openalex.org/W2766490181","https://openalex.org/W3121621657","https://openalex.org/W1757458251","https://openalex.org/W2167352378","https://openalex.org/W2162273398","https://openalex.org/W3149798288"],"abstract_inverted_index":{"The":[0],"purpose":[1],"of":[2,28],"this":[3],"lecture":[4],"is":[5],"to":[6],"illustrate":[7],"a":[8,13,29],"design-for-reliability":[9],"(DFR)":[10],"strategy":[11],"via":[12],"soft":[14,32],"error":[15,33],"case":[16],"study.":[17],"We":[18],"review":[19],"relevant":[20],"methodologies":[21],"that":[22],"target":[23],"different":[24],"levels":[25],"and":[26,39,49],"stages":[27],"multi-core":[30],"design:":[31],"modeling,":[34],"robust":[35],"circuit":[36],"design,":[37],"microarchitecture,":[38],"chip":[40],"architecture.":[41],"Finally":[42],"we":[43],"discuss":[44],"several":[45],"emerging":[46],"DFR":[47],"challenges":[48],"possible":[50],"mitigation":[51],"solutions.":[52]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
