{"id":"https://openalex.org/W2156643581","doi":"https://doi.org/10.1109/test.2007.4437620","title":"SPARTAN: a spectral and information theoretic approach to partial-scan","display_name":"SPARTAN: a spectral and information theoretic approach to partial-scan","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2156643581","doi":"https://doi.org/10.1109/test.2007.4437620","mag":"2156643581"},"language":"en","primary_location":{"id":"doi:10.1109/test.2007.4437620","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2007.4437620","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083099798","display_name":"Omar I. Khan","orcid":null},"institutions":[{"id":"https://openalex.org/I102322142","display_name":"Rutgers, The State University of New Jersey","ror":"https://ror.org/05vt9qd57","country_code":"US","type":"education","lineage":["https://openalex.org/I102322142"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Omar I. Khan","raw_affiliation_strings":["Department of ECE and CAIP Research Center, Rutgers University, Piscataway, NJ, USA"],"affiliations":[{"raw_affiliation_string":"Department of ECE and CAIP Research Center, Rutgers University, Piscataway, NJ, USA","institution_ids":["https://openalex.org/I102322142"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020404037","display_name":"M.L. Bushnell","orcid":null},"institutions":[{"id":"https://openalex.org/I102322142","display_name":"Rutgers, The State University of New Jersey","ror":"https://ror.org/05vt9qd57","country_code":"US","type":"education","lineage":["https://openalex.org/I102322142"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael L. Bushnell","raw_affiliation_strings":["Department of ECE and CAIP Research Center, Rutgers University, Piscataway, NJ, USA"],"affiliations":[{"raw_affiliation_string":"Department of ECE and CAIP Research Center, Rutgers University, Piscataway, NJ, USA","institution_ids":["https://openalex.org/I102322142"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084430416","display_name":"Suresh k Devanathan","orcid":null},"institutions":[{"id":"https://openalex.org/I102322142","display_name":"Rutgers, The State University of New Jersey","ror":"https://ror.org/05vt9qd57","country_code":"US","type":"education","lineage":["https://openalex.org/I102322142"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Suresh K. Devanathan","raw_affiliation_strings":["Department of ECE and CAIP Research Center, Rutgers University, Piscataway, NJ, USA"],"affiliations":[{"raw_affiliation_string":"Department of ECE and CAIP Research Center, Rutgers University, Piscataway, NJ, USA","institution_ids":["https://openalex.org/I102322142"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084081268","display_name":"Vishwani D. Agrawal","orcid":"https://orcid.org/0000-0002-7121-5979"},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vishwani D. Agrawal","raw_affiliation_strings":["Department of ECE, Aubum University, Auburn, AL, USA"],"affiliations":[{"raw_affiliation_string":"Department of ECE, Aubum University, Auburn, AL, USA","institution_ids":["https://openalex.org/I82497590"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5083099798"],"corresponding_institution_ids":["https://openalex.org/I102322142"],"apc_list":null,"apc_paid":null,"fwci":1.5913,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.84862693,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.9044811725616455},{"id":"https://openalex.org/keywords/scan-chain","display_name":"Scan chain","score":0.7649707794189453},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6760363578796387},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.5384924411773682},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.5370665192604065},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.5063799619674683},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.4788239300251007},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.47879108786582947},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4587670862674713},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.4475407004356384},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.44495314359664917},{"id":"https://openalex.org/keywords/boundary-scan","display_name":"Boundary scan","score":0.4309743642807007},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.4288894534111023},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3485671877861023},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3154650926589966},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.24346938729286194},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.20399370789527893},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18588787317276},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.09653007984161377}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.9044811725616455},{"id":"https://openalex.org/C150012182","wikidata":"https://www.wikidata.org/wiki/Q225990","display_name":"Scan chain","level":3,"score":0.7649707794189453},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6760363578796387},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.5384924411773682},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.5370665192604065},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.5063799619674683},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.4788239300251007},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.47879108786582947},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4587670862674713},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.4475407004356384},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.44495314359664917},{"id":"https://openalex.org/C992767","wikidata":"https://www.wikidata.org/wiki/Q895156","display_name":"Boundary scan","level":3,"score":0.4309743642807007},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.4288894534111023},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3485671877861023},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3154650926589966},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.24346938729286194},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.20399370789527893},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18588787317276},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.09653007984161377},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/test.2007.4437620","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2007.4437620","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Test Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.137.1522","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.137.1522","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eng.auburn.edu/~vagrawal/TALKS/SPARTAN_ITC_EXPRESS.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5299999713897705,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W1822961975","https://openalex.org/W1971634341","https://openalex.org/W1983621102","https://openalex.org/W2004007251","https://openalex.org/W2012170251","https://openalex.org/W2022549597","https://openalex.org/W2066974842","https://openalex.org/W2072555249","https://openalex.org/W2077537277","https://openalex.org/W2078888330","https://openalex.org/W2083783920","https://openalex.org/W2096247094","https://openalex.org/W2099111195","https://openalex.org/W2106669085","https://openalex.org/W2115194780","https://openalex.org/W2115220706","https://openalex.org/W2116254096","https://openalex.org/W2120723497","https://openalex.org/W2134283834","https://openalex.org/W2134427430","https://openalex.org/W2134626087","https://openalex.org/W2135129887","https://openalex.org/W2135931142","https://openalex.org/W2139356796","https://openalex.org/W2140868550","https://openalex.org/W2147517890","https://openalex.org/W2149107969","https://openalex.org/W2151103764","https://openalex.org/W2158102622","https://openalex.org/W2160162958","https://openalex.org/W2161273503","https://openalex.org/W2164296477","https://openalex.org/W2274041873","https://openalex.org/W2478708596","https://openalex.org/W4230587734","https://openalex.org/W4254112056"],"related_works":["https://openalex.org/W2117171289","https://openalex.org/W1852363244","https://openalex.org/W1501621551","https://openalex.org/W2888456858","https://openalex.org/W2001654810","https://openalex.org/W2127184179","https://openalex.org/W2049913894","https://openalex.org/W2061168866","https://openalex.org/W2080818541","https://openalex.org/W2537616607"],"abstract_inverted_index":{"We":[0,57],"propose":[1,58],"a":[2],"new":[3,168],"partial-scan":[4,60,169],"algorithm,":[5],"the":[6,13,32,35,42,46,104,131,138],"first":[7],"to":[8,25,44,63,96,103,125],"use":[9,150],"toggling":[10],"rates":[11],"of":[12,23,34,51,106],"flip-flops":[14,24,27,129],"(analyzed":[15],"using":[16,59],"DSP":[17],"methods)":[18],"and":[19,77,115,143,149],"Shannon":[20],"entropy":[21],"measures":[22],"select":[26],"for":[28,61,85,94,141,158,166],"scan.":[29],"This":[30,154],"improves":[31,55],"testability":[33],"circuit-under-test":[36],"(CUT).":[37],"Entropy":[38],"is":[39,91,155],"maximized":[40],"throughout":[41],"circuit":[43,121,132],"maximize":[45,64],"information":[47],"flow":[48],"(the":[49],"principle":[50],"maximum":[52],"entropy),":[53],"which":[54],"testability.":[56],"testing,":[62,95],"fault":[65],"coverage":[66],"(FC),":[67],"reduce":[68,72,78,97],"test":[69,73,79],"volume":[70],"(TV),":[71],"application":[74],"time":[75],"(TAT),":[76],"power":[80],"(TP)":[81],"but":[82,109],"we":[83],"allow":[84],"full-scan":[86],"during":[87],"silicon":[88],"debug.":[89],"Full-scan":[90],"commonly":[92],"used":[93],"sequential":[98],"automatic":[99],"test-pattern":[100],"generation":[101],"(ATPG)":[102],"complexity":[105],"combinational":[107],"ATPG,":[108],"comes":[110],"with":[111],"serious":[112],"TV,":[113],"TAT,":[114],"TP":[116],"overheads.":[117],"Partial-scan":[118],"significantly":[119],"reduces":[120],"delay,":[122],"when":[123],"compared":[124],"full-scan,":[126,142],"because":[127],"critical":[128,157],"in":[130],"data":[133],"path":[134],"do":[135],"not":[136],"have":[137],"extra":[139],"hardware":[140],"therefore":[144],"are":[145],"roughly":[146],"5%":[147],"faster,":[148],"10%":[151],"less":[152],"area.":[153],"particularly":[156],"microprocessors.":[159],"The":[160],"HITEC":[161],"ATPG":[162],"program":[163],"generated":[164],"results":[165],"this":[167],"algorithm.":[170]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}