{"id":"https://openalex.org/W1919142578","doi":"https://doi.org/10.1109/test.2002.1041911","title":"IC mixed-signal BIST: separating facts from fiction","display_name":"IC mixed-signal BIST: separating facts from fiction","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1919142578","doi":"https://doi.org/10.1109/test.2002.1041911","mag":"1919142578"},"language":"en","primary_location":{"id":"doi:10.1109/test.2002.1041911","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041911","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082456416","display_name":"S.K. Sunter","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"S.K. Sunter","raw_affiliation_strings":["Logic Vision, Inc., USA"],"affiliations":[{"raw_affiliation_string":"Logic Vision, Inc., USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5082456416"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5031,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.64305894,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1205","last_page":"1205"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.7790043354034424},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6333602070808411},{"id":"https://openalex.org/keywords/waveform","display_name":"Waveform","score":0.5482733845710754},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5472287535667419},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.483389288187027},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.48029252886772156},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47011223435401917},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.45785602927207947},{"id":"https://openalex.org/keywords/histogram","display_name":"Histogram","score":0.4169737696647644},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3376495838165283},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3203522861003876},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2940050959587097},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2706356644630432},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1124020516872406}],"concepts":[{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.7790043354034424},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6333602070808411},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.5482733845710754},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5472287535667419},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.483389288187027},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.48029252886772156},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47011223435401917},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.45785602927207947},{"id":"https://openalex.org/C53533937","wikidata":"https://www.wikidata.org/wiki/Q185020","display_name":"Histogram","level":3,"score":0.4169737696647644},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3376495838165283},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3203522861003876},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2940050959587097},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2706356644630432},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1124020516872406},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C554190296","wikidata":"https://www.wikidata.org/wiki/Q47528","display_name":"Radar","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2002.1041911","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041911","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W1691451471","https://openalex.org/W1839452802"],"related_works":["https://openalex.org/W2150379246","https://openalex.org/W1646128378","https://openalex.org/W2149724644","https://openalex.org/W2168668096","https://openalex.org/W1909129617","https://openalex.org/W2144814304","https://openalex.org/W2397378090","https://openalex.org/W2123664180","https://openalex.org/W1580058787","https://openalex.org/W2115695591"],"abstract_inverted_index":{"Summary":[0],"form":[1],"only":[2,130],"given.":[3],"BIST,":[4],"by":[5],"definition,":[6],"requires":[7],"on-chip":[8,14,43,158,167],"generation":[9],"of":[10,16,28,105,117,174],"the":[11,17,37,52,56,166,175],"stimulus,":[12],"and":[13,88,113,145,153,164,178],"analysis":[15,68],"response,":[18],"sufficient":[19],"to":[20,36,54,85,103,123,136,142],"produce":[21],"a":[22,26,99],"pass/fail":[23],"result":[24],"or":[25,60,64,72],"series":[27],"bits":[29,78],"that":[30,104,156],"any":[31],"tester":[32],"can":[33],"compare":[34],"bit-wise":[35],"expected":[38],"bit":[39,62],"values.":[40],"Many":[41],"so-called":[42],"mixed-signal":[44,106],"built-in":[45],"self-test":[46],"(MS-BIST)":[47],"approaches":[48],"in":[49,98,132,182],"fact":[50],"require":[51],"ATE":[53],"supply":[55],"stimulus":[57],"(analog":[58],"waveform,":[59],"sigma-delta":[61],"stream),":[63],"perform":[65],"some":[66],"response":[67],"(DSP,":[69],"histogram":[70],"processing,":[71],"RMS":[73],"calculation),":[74],"especially":[75],"when":[76],">10":[77],"linearity":[79],"is":[80,129,180],"being":[81],"tested.":[82],"For":[83,134],"MS-BIST":[84,135],"be":[86,124,161],"technically":[87],"economically":[89],"successful,":[90],"it":[91,139],"must":[92],"test":[93,100,149,154,176],"all":[94],"key":[95],"parameters,":[96],"at-speed,":[97],"time":[101],"comparable":[102],"ATE,":[107],"with":[108],"less":[109],"than":[110],"1-2K":[111],"gates,":[112],"permit":[114],"new":[115],"types":[116],"tests":[118],"(and":[119],"higher":[120],"accuracy":[121],"tests)":[122],"added":[125],"post-silicon":[126],"-presently":[127],"this":[128],"available":[131],"fiction.":[133],"become":[137],"fact,":[138],"will":[140,160,169],"have":[141],"evolve":[143],"gracefully":[144],"gradually":[146],"from":[147],"partitioned":[148],"resources.":[150],"New":[151],"DFT":[152],"methods":[155],"minimize":[157],"circuitry":[159,177],"implemented":[162],"first,":[163],"then":[165],"portion":[168],"increase":[170],"as":[171],"each":[172],"component":[173],"method":[179],"proven":[181],"production.":[183]},"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
