{"id":"https://openalex.org/W2118049955","doi":"https://doi.org/10.1109/tcad.2009.2013270","title":"Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip Design","display_name":"Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip Design","publication_year":2009,"publication_date":"2009-02-19","ids":{"openalex":"https://openalex.org/W2118049955","doi":"https://doi.org/10.1109/tcad.2009.2013270","mag":"2118049955"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2009.2013270","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2013270","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084943434","display_name":"Dipanjan Sengupta","orcid":null},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"D. Sengupta","raw_affiliation_strings":["System-on-Chip Laboratory, Electrical and Computer Engineering Department, University of British Columbia, Vancouver, BC, Canada","Electr. & Comput. Eng. Dept., Univ. of British Columbia, Vancouver, BC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System-on-Chip Laboratory, Electrical and Computer Engineering Department, University of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Univ. of British Columbia, Vancouver, BC","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110728617","display_name":"R.A. Saleh","orcid":null},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"R.A. Saleh","raw_affiliation_strings":["System-on-Chip Laboratory, Electrical and Computer Engineering Department, University of British Columbia, Vancouver, BC, Canada","Electr. & Comput. Eng. Dept., Univ. of British Columbia, Vancouver, BC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System-on-Chip Laboratory, Electrical and Computer Engineering Department, University of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Univ. of British Columbia, Vancouver, BC","institution_ids":["https://openalex.org/I141945490"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I141945490"],"apc_list":null,"apc_paid":null,"fwci":2.1151,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.87415457,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"28","issue":"3","first_page":"316","last_page":"326"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.560250997543335},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.542698323726654},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5232043266296387},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.48355934023857117},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.47946274280548096},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.4600072205066681},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.45218485593795776},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.4127557575702667},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3214835226535797},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23021778464317322},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18733295798301697},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.17019504308700562},{"id":"https://openalex.org/keywords/data-mining","display_name":"Data mining","score":0.16312050819396973},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.14473161101341248}],"concepts":[{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.560250997543335},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.542698323726654},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5232043266296387},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.48355934023857117},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.47946274280548096},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.4600072205066681},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.45218485593795776},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.4127557575702667},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3214835226535797},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23021778464317322},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18733295798301697},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.17019504308700562},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.16312050819396973},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.14473161101341248},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2009.2013270","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2013270","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/14","display_name":"Life below water","score":0.44999998807907104}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":56,"referenced_works":["https://openalex.org/W1541589219","https://openalex.org/W1582019256","https://openalex.org/W1862367345","https://openalex.org/W1864858180","https://openalex.org/W1927590974","https://openalex.org/W1967800299","https://openalex.org/W2003547208","https://openalex.org/W2007916227","https://openalex.org/W2015033143","https://openalex.org/W2043165230","https://openalex.org/W2055713419","https://openalex.org/W2073092303","https://openalex.org/W2082348718","https://openalex.org/W2087645421","https://openalex.org/W2098143668","https://openalex.org/W2103227017","https://openalex.org/W2104771005","https://openalex.org/W2106319297","https://openalex.org/W2108143446","https://openalex.org/W2108519747","https://openalex.org/W2114621701","https://openalex.org/W2116785402","https://openalex.org/W2118177820","https://openalex.org/W2124472440","https://openalex.org/W2125263803","https://openalex.org/W2125630634","https://openalex.org/W2129021906","https://openalex.org/W2135040451","https://openalex.org/W2137729255","https://openalex.org/W2139524433","https://openalex.org/W2142386205","https://openalex.org/W2146554181","https://openalex.org/W2147126729","https://openalex.org/W2148698121","https://openalex.org/W2149009819","https://openalex.org/W2153677786","https://openalex.org/W2156974682","https://openalex.org/W2160158199","https://openalex.org/W2160868885","https://openalex.org/W2161683695","https://openalex.org/W2163632212","https://openalex.org/W2166295488","https://openalex.org/W2168300107","https://openalex.org/W2168908650","https://openalex.org/W2169428272","https://openalex.org/W4234506857","https://openalex.org/W4238906052","https://openalex.org/W4238927715","https://openalex.org/W4247576025","https://openalex.org/W4250380587","https://openalex.org/W4250661686","https://openalex.org/W4253970385","https://openalex.org/W6652141237","https://openalex.org/W6660880385","https://openalex.org/W6675468258","https://openalex.org/W6683557205"],"related_works":["https://openalex.org/W2161144997","https://openalex.org/W2359068514","https://openalex.org/W2373668538","https://openalex.org/W2056254149","https://openalex.org/W2355525742","https://openalex.org/W2385034530","https://openalex.org/W1484946411","https://openalex.org/W2159606196","https://openalex.org/W2360311116","https://openalex.org/W2127124373"],"abstract_inverted_index":{"Among":[0],"the":[1,19,35,51,71,83,99,106,116,121],"different":[2,20],"methods":[3],"of":[4,53,74,97,102,165],"reducing":[5,54,98],"power":[6,149],"for":[7,77],"core-based":[8],"system-on-chip":[9],"(SoC)":[10],"designs,":[11],"thevoltage-islandtechniquehas":[12],"gained":[13],"in":[14,34,148,153],"popularity.":[15],"Assigning":[16],"cores":[17,122],"to":[18,25,44,111,136],"supply":[21,75],"voltages":[22,76],"and":[23,47,59,150],"floorplanning":[24],"create":[26],"contiguous":[27],"voltage":[28,45,85,107],"islands":[29],"are":[30,155],"two":[31],"important":[32],"steps":[33],"design":[36],"process.":[37],"We":[38,119],"propose":[39],"a":[40,89,95,112,126,133,137,145],"new":[41],"application-driven":[42],"approach":[43],"partitioning":[46],"island":[48],"creation":[49],"with":[50,141,160],"objective":[52],"overall":[55],"SoC":[56],"power,":[57],"area,":[58],"floorplanner":[60],"runtime.":[61],"Given":[62],"an":[63,161],"application":[64,117],"power-state":[65],"machine":[66],"(PSM),":[67],"we":[68,81,93],"first":[69],"identify":[70],"suitable":[72],"range":[73],"each":[78],"core.":[79],"Then,":[80],"generate":[82],"discrete":[84],"assignment":[86,108,135],"table":[87,109],"using":[88,115,125,157],"heuristic":[90],"technique.":[91],"Next,":[92],"describe":[94],"methodology":[96],"large":[100],"number":[101],"available":[103],"choices":[104],"from":[105,132],"down":[110],"useful":[113],"set":[114],"PSM.":[118],"partition":[120],"into":[123],"islands,":[124],"cost":[127],"function":[128],"that":[129],"gradually":[130],"shifts":[131],"power-based":[134],"connectivity-based":[138],"one.":[139],"Compared":[140],"previously":[142],"reported":[143],"techniques,":[144],"9.4%":[146],"reduction":[147,152],"8.7%":[151],"area":[154],"achieved":[156],"our":[158],"approach,":[159],"average":[162],"runtime":[163],"improvement":[164],"2.4":[166],"times.":[167]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}